This version (11 Feb 2021 08:35) was approved by Istvan Csomortani.The Previously approved version (10 Feb 2021 10:33) is available.Diff

AD7091 FMC-SDP Interposer & Evaluation Board / Xilinx AC701 Reference Design

Supported Devices

Evaluation Boards


This document presents the steps to setup an environment for using the EVAL-AD7091SDZ evaluation board together with the Xilinx AC701 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD7091SDZ Evaluation Board with the Xilinx AC701 board.


For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · Adrian Costina

Below is presented a picture of SDP-B Controller Board with the EVAL-AD7091SDZ Evaluation Board.


The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09 V to 5.25 V power supply. The AD7091 also features an on-chip conversion clock and a high speed serial interface.

The EVAL-AD7091SDZ evaluation board is a member of a growing number of boards available for the SDP. It was designed to help customers evaluate performance or quickly prototype new AD7091 circuits and reduce design time.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 14.6
  • A UART terminal (Tera Term/Hyperterminal/Termite), baud rate 115200.


Run the Demonstration Project

Hardware Setup

Before connecting the ADI evaluation board to the Xilinx AC701 make sure that the VADJ_FPGA voltage of the AC701 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx AC701 product page.

  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx AC701 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the AC701 and power up the FPGA board.
  • Power up the the EVAL-AD7091SDZ with 7 V to 9 V external power supply.

The next step is to setup the software project.

Software Project Setup

The next steps should be followed to recreate the software project of the reference design:

  • Copy the folder ../fpgahdl_xilinx/cf_lib and ../fpgahdl_xilinx/cf_sdp_adc/cf_ad7091_ac701 to your working directory
  • Open a Xilinx SDK and setup your workspace to %Working directory%/cf_ad7091_ac701/SDK/SDK_Workspace
  • In the SDK select the File→Import menu option to import the software project into your workspace.

Import Projects

  • In the Import window select the General→Existing Projects into Workspace option.

Existing Projects Import

  • In the Import Projects window select the %Working directory%/cf_ad7091_ac701/ folder as root directory and verify if all the three project (hw, bsp, sw) are checked.

Selecting Existing Projects

  • The Project Explorer window now shows the projects that exist in the workspace without software files.

Project Explorer

  • Now you have to add the source files to your project. You can download all the source files for the current reference project using the links from the Downloads section. List of source files for the current project is:
    • Driver files : ad7091.h and ad7091.c
    • Platform specific files : Communication.h, Communication.c, TIME.h and TIME.c
    • ADC specific files : main.c and xdma_config.h
  • All these files must be copied into the %Working directory%/cf_ad7091_ac701/SDK/SDK_Workspace/sw/src/ folder.
  • The SDK should automatically build the project and the Console window will display the result of the build. If the build is not done automatically, select the Project→Build Automatically menu option.
  • If the project was built without any errors, you need to download the data capture script, from here. Copy the Data_capture folder to your working directory.
  • Run the data_capture.bat script. If the acquisition is finished with success, it should appear a file called Acquisition.csv with the result of the conversion.

Acquisition Finished

  • By default the length of a transaction is 16k samples. The input signal used in this reference design was a 10 Khz sine wave.

Acquisition Result

More information

28 May 2012 15:18
resources/fpga/xilinx/interposer/ad7091.txt · Last modified: 11 Feb 2021 08:35 by Istvan Csomortani