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resources:fpga:xilinx:interposer:ad5791 [28 Sep 2012 11:26]
AdrianC Added common section for describing the evaluation setup and System Demonstration Platform
resources:fpga:xilinx:interposer:ad5791 [30 Sep 2013 15:39]
LucianS changed source code (without Micrium uC-Probe), added Software Setup, remove programming with Impact
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>​AD5791|EVAL-AD5791SDZ]]** evaluation board together with the Xilinx KC705 FPGA boardthe Xilinx Embedded Development Kit (EDK) and the [[http://​micrium.com/​page/​products/​tools/​probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5791SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>​AD5791|EVAL-AD5791SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5791SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :​resources:​fpga:​xilinx:​interposer:​img_ad5791.jpg?​400 }} {{ :​resources:​fpga:​xilinx:​interposer:​img_ad5791.jpg?​400 }}
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   * [[adi>​AD5791|AD5791 Product Info]] - pricing, samples, datasheet   * [[adi>​AD5791|AD5791 Product Info]] - pricing, samples, datasheet
   * [[adi>/​static/​imported-files/​user_guides/​UG-185.pdf|EVAL-AD5791SDZ evaluation board user guide]]   * [[adi>/​static/​imported-files/​user_guides/​UG-185.pdf|EVAL-AD5791SDZ evaluation board user guide]]
-  * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]] 
-  * [[http://​micrium.com/​page/​products/​tools/​probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack)+  * Xilinx ISE 14.6
-  * [[http://micrium.com/​page/​products/​tools/​probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal),​ baud rate 115200. 
 +  * The EVAL-AD5791 reference project for Xilinx KC705 FPGA.
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:​fpga:xilinx:​interposer:​ad5791_evalboard.zip|Reference Design Files}} +\\ 
- +  * **AD5791 Driver:** https://github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_drivers/​AD5791 
-The following table presents a short description the reference design archive contents. +  * **AD5791 Commands:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_commands/​AD5791 
- +  ​* **Xilinx Boards Common Drivers:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​platform_drivers/​Xilinx/​SDP_Common 
-**Folder** **Description** +  * **EDK KC705 Reference ​project:** https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_sdp_kc705 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation| +\\ 
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +</​WRAP>​
-| Software | Contains the source files of the software ​project ​that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
-{{page>​ucprobe_common}} +===== Hardware setup =====
- +
-===== Demonstration Project User Interface ​===== +
- +
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD5791SDZ** evaluation board. +
- +
-{{ :​resources:​fpga:​altera:​bemicro:​ad5791interface.png?​700 }} +
- +
-The communication with the board is activated / deactivated by toggling the **//​ON/​OFF//​** switch. The **//​Activity//​** LED turns green when the communication is active. If the **//​ON/​OFF//​** switch is set to **//ON//** and the **//​Activity//​** LED is **//​BLACK//​** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems. +
- +
-The value of the AD5791 //DAC Register// is changed using the slider located under the **//DAC Register Value (20-bit)//​** label. The selected value is displayed in the numeric box located next to the slider. +
- +
-The value of the AD5791 Clearcode Register is changed using the slider located under the **//​Clearcode Register Value (20-bit)//​** label. The selected value is displayed in the numeric box located next to the slider. +
- +
-The sliders **//​Vref+//​** and **//​Vref-//​** are used to specify the reference voltages set on the evaluation board. +
- +
-The DAC’s output voltage is displayed in the numeric box having the label **//Output voltage//​**.+
  
-The values of the //Control Register’s//​ bits are indicated by the LEDs situated ​to the right of the **//Control Register//​** labelWhen a LED is lit it means that the corresponding bit value is 1.+<WRAP round important 80%> 
 +\\ 
 +Before connecting ​the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage ​of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</​WRAP>​
  
-The values of the //Status Control Register’s//​ bits are indicated by the LEDs situated ​to the right of the **//Status Control Register//​** labelWhen a LED is lit it means that the corresponding bit value is 1.+  * Use the FMC-SDP interposer to connect ​the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. 
 +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-The DAC register coding is controlled by the **//DAC Register Coding//** switchWhen the switch is set to the **//B0//** position the binary offset coding is selected by setting the //BIN/2sC// bit of the //Control Register// ​to 1 When the switch is set to the **//C2//** position the two’s complement coding is selected by setting the //BIN/2sC// bit of the //Control Register// to 0.+<WRAP round important 80%> 
 +\\ 
 +To power on the EVAL-AD5791 evaluation board, you need to provide external differential supply voltage to J1 connector(for more information see: [[adi>/static/imported-files/user_guides/UG-185.pdf|EVAL-AD5791SDZ evaluation board user guide]]) and a 5V reference voltage ​to VREF connector on the evaluation board. VREFN will be connected ​to AGND (LK8 option=A and LK9 option=B). 
 +</WRAP>
  
-The **//​Load ​DAC//** switch is used to control ​the //LDAC// signal of the AD5791When the switch is pressed ​the DAC register ​(and consequently ​the DAC’s outputis updated with the contents ​of the DAC’s input register.+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5791 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +**help?** | Displays all available commands. | 
 +| **reset!** | Resets the device. | 
 +| **coding=** | Selects the coding style. Accepted values:\\ 0 - Two's complement coding.(default)\\ 1 - Offset binary coding. | 
 +| **coding?** | Display the current coding style. | 
 +| **register=** | Writes to the DAC register. Accepted values:\\ 0 .. 1048575 - the value written to the DAC. | 
 +**register?** | Displays last written value to the DAC register. | 
 +| **voltage=** | Sets the DAC output voltageAccepted values:\\ -10 .. +10 - desired output voltage in volts. | 
 +| **voltage?​** | Displays ​the output voltage. | 
 +| **output=** | Selects ​the DAC output state. Accepted values:\\ 0 - Normal state.\\ 1 - Clamped via 6KOhm to AGND.(default)\\ 2 - Tristate. | 
 +| **output?** | Displays ​the DAC output ​state. | 
 +| **rbuf=** | Sets/resets the RBUF bit from control register. Accepted values:\\ 0 - RBUF is reset.\\ 1 - RBUF is set.(default) | 
 +| **rbuf?** | Displays ​the value of RBUF bit from control ​register. ​|
  
-The **//RBUF Control//** switch is used to set the value of the //RBUF// bit from the //Control Register//. When the switch is active the bit’s value is set to 1. 
  
 +Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Troubleshooting =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :​resources:​fpga:​xilinx:​interposer:​Terminal_KC705.jpg?​ }}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +===== Software Project Setup ===== 
-  * Check that the evaluation board is powered as instructed in the board'​s user guide. +{{page>​import_workspace}}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//​**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
   * [[resources:​tools-software:​linux-drivers:​iio-dac:​ad5791|AD5791 IIO DAC Linux Driver]]   * [[resources:​tools-software:​linux-drivers:​iio-dac:​ad5791|AD5791 IIO DAC Linux Driver]]
 {{page>​ez_common}} {{page>​ez_common}}
resources/fpga/xilinx/interposer/ad5791.txt · Last modified: 30 Sep 2013 15:39 by LucianS