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AD5694R FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Evaluation Boards

Overview

This document presents the steps to setup an environment for using the EVAL-AD5694RSDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-AD5694RSDZ Evaluation Board with the Xilinx KC705 board.

img_ad5694r.jpg

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · AdrianC

Below is presented a picture of SDP-B Controller Board with the EVAL-AD5694RSDZ Evaluation Board.

The EVAL-AD5694RSDZ evaluation board is designed to help customers quickly prototype new AD5694R/ AD5694R circuits and reduce design time.

The AD5694R nanoDAC is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
  • uC-Probe run-time monitoring tool

Downloads

The following table presents a short description the reference design archive contents.

Folder Description
Bit Contains the KC705 configuration file that can be used to program the system for quick evaluation.
Microblaze Contains the EDK project for the Microblaze softcore that will be implemented in the KC705 FPGA.
Software Contains the source files of the software project that will be run by the Microblaze processor.
uCProbeInterface Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory.

Run the Demonstration Project

Hardware Setup

Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  • Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Kintex 7 device (see screenshot below).

  • Program the KC705 FPGA using the “Bit/download.bit” file provided in the reference design archive.
  • Power the ADI evaluation board.

At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.

Configure uC-Probe

Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.

Select uC-Probe options.

  • Click on the uC-Probe icon on the top left portion of the screen.
  • Click on the Options button to open the dialog box.

Set target board communication protocol as RS-232

  • Click on the Communication tab icon on the top left portion of the dialog box
  • Select the RS-232 option.

Setup RS-232 communication settings

  • Select the RS-232 option from the Communication tab.
  • Select the COM port to which the KC705 board is connected.
  • Set the Baud Rate to 115200 bps.

  • Press Apply and OK to exit the options menu.

Load and Run the Demonstration Project

  • Click the Open option from the uC-Probe menu and select the file ucProbeInterface/AD5694R_Interface.wsp provided within the reference design files.
  • Before opening the interface uC-Probe will ask for a symbols file that must be associated with the interface. Select the file ucProbeInterface/ADIEvalBoard.elf to be loaded as a symbol file.
  • Run the demonstration project by pressing the Play button.

In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the Stop button and run it again by pressing the Play button.

Demonstration Project User Interface

The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-AD5694RSDZ evaluation board.

Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.

Section B is used to select the Command to be sent to the DAC. The definition of each command is available in Table 7 of the part's datasheet.

Section C is used to select the Address of the registers to be affected by the command, if the command is 1, 2 or 3. If the selected command is 5, the Address buttons will be used to program the LDAK MASK REGISTER for the corresponding DAC. For the other commands, they are ignored.

Section D is used to program the value to be written to the DAC registers.

Section E is used to send the selected command to the DAC.

Section F is used to configure the databits sent for the command 4. Each DAC's power operation can be configured independently.

Section G is used to configure the databits sent for the command 7. If the button is pressed, the Internal reference will be turned off.

Section H is used to control the Hardware pins of the AD7694R.

Section I is used to perform a readback of all four registers of AD7694R.

Troubleshooting

In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues:

  • Check that the evaluation board is powered as instructed in the board's user guide.
  • In uC-Probe refresh the symbols file by right-clicking on the System Browser window and selecting Refresh Symbols.
  • If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.

More information

28 May 2012 15:18
resources/fpga/xilinx/interposer/ad5694r.1348824131.txt.gz · Last modified: 28 Sep 2012 11:22 by AdrianC