This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revision | Last revisionBoth sides next revision | ||
resources:fpga:xilinx:interposer:ad5570 [13 Sep 2013 10:44] – [Reference Project Overview] Istvan Csomortani | resources:fpga:xilinx:interposer:ad5570 [02 Oct 2013 11:11] – remove reference_design_files.zip, changed driver and commands, remove quick start evaluation Lucian Sin | ||
---|---|---|---|
Line 24: | Line 24: | ||
The [[adi> | The [[adi> | ||
- | The **EVAL-AD5570** evaluation board is designed to help customers quickly prototype new AD5570 circuits and reduce design time. The board requires +6 V supply. | + | The **EVAL-AD5570** evaluation board is designed to help customers quickly prototype new AD5570 circuits and reduce design time. |
===== More information ===== | ===== More information ===== | ||
Line 43: | Line 43: | ||
===== Required Software ===== | ===== Required Software ===== | ||
- | * Xilinx ISE 14.6 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | + | * Xilinx ISE 14.6 |
* UART Terminal (Termite/ | * UART Terminal (Termite/ | ||
* The EVAL-AD5570 reference project for Xilinx KC705 FPGA | * The EVAL-AD5570 reference project for Xilinx KC705 FPGA | ||
Line 50: | Line 50: | ||
<WRAP round download 80%> | <WRAP round download 80%> | ||
\\ | \\ | ||
- | * {{: | ||
* **AD5570 Driver:** https:// | * **AD5570 Driver:** https:// | ||
* **AD5570 Commands:** https:// | * **AD5570 Commands:** https:// | ||
Line 69: | Line 68: | ||
<WRAP round important 80%> | <WRAP round important 80%> | ||
\\ | \\ | ||
- | To power on the EVAL-AD5570 evaluation board, you need to provide external +12V VDD and -12V VSS supply voltage | + | To power on the EVAL-AD5570 evaluation board, you need to provide external +12V VDD and -12V VSS supply voltage to J5 connector on the board. For more information see: [[adi>/ |
</ | </ | ||
- | |||
- | ===== Quick start evaluation ===== | ||
- | For a quick start evaluation, run the **download.bat** script located in the **SDK/ | ||
- | |||
- | <WRAP round info 80%> | ||
- | \\ | ||
- | The **download.bat** script assumes that the Xilinx ISE Design Suite 14.6 is installed at this path: **C:/ | ||
- | </ | ||
- | |||
- | If programming was successful, you should be seeing the command messages appear on the terminal. | ||
===== Reference Project Overview ===== | ===== Reference Project Overview ===== |