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resources:fpga:xilinx:interposer:ad5553 [16 Nov 2012 16:33] – [Evaluation Boards] fixup eval board link Lars-Peter Clausen | resources:fpga:xilinx:interposer:ad5553 [02 Oct 2013 17:01] – [Reference Project Overview] Lucian Sin | ||
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====== Overview ====== | ====== Overview ====== | ||
- | This document presents the steps to setup an environment for using the **[[adi> | + | This document presents the steps to setup an environment for using the **[[adi> |
{{ : | {{ : | ||
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* [[adi>/ | * [[adi>/ | ||
* [[http:// | * [[http:// | ||
- | * [[http:// | ||
====== Getting Started ====== | ====== Getting Started ====== | ||
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===== Required Software ===== | ===== Required Software ===== | ||
- | * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | + | * Xilinx ISE 14.6. |
- | * [[http://micrium.com/ | + | * UART Terminal (Termite/Tera Term/Hyperterminal), |
+ | * The EVAL-AD5553 reference project for Xilinx KC705 FPGA. | ||
===== Downloads ===== | ===== Downloads ===== | ||
+ | <WRAP round download 80%> | ||
+ | \\ | ||
+ | * **AD5553 Driver:** https:// | ||
+ | * **AD5553 Commands:** https:// | ||
+ | * **Xilinx Boards Common Drivers:** https:// | ||
+ | * **EDK KC705 Reference project:** https:// | ||
+ | \\ | ||
+ | </ | ||
- | * {{: | ||
- | The following table presents a short description the reference design archive contents. | + | ===== Hardware setup ===== |
- | ^ **Folder** ^ **Description** ^ | + | <WRAP round important 80%> |
- | | Bit | Contains | + | \\ |
- | | Microblaze | Contains the EDK 13.4 project for the Microblaze softcore | + | Before connecting |
- | | Software | Contains the source files of the software project that will be run by the Microblaze processor.| | + | </ |
- | | uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe | + | |
- | ====== Run the Demonstration Project ====== | + | * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. |
+ | * Connect the JTAG and UART cables to the KC705 and power up the FPGA board. | ||
- | {{page>ucprobe_common}} | + | <WRAP round important 80%> |
+ | \\ | ||
+ | To power on the EVAL-AD5543 evaluation board, you need to provide +10V VDD, -10V VSS and +5V DVDD to J1 connector on the board. | ||
+ | </WRAP> | ||
- | ===== Demonstration | + | ===== Reference |
+ | The following commands were implemented in this version of EVAL-AD5553 reference project for Xilinx KC705 FPGA board. | ||
+ | ^ Command ^ Description ^ | ||
+ | | **help?** | Displays all available commands. | | ||
+ | | **register=** | Writes to the DAC register. Accepted values:\\ 0 .. 16383 - the value written to the DAC. | | ||
+ | | **register? | ||
+ | | **voltage=** | Sets the DAC output voltage. Accepted values:\\ -5000 .. 0 - desired output voltage in milivolts. | | ||
+ | | **voltage? | ||
- | The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling | + | Commands |
- | {{ : | + | The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. |
+ | {{ : | ||
- | The communication with the board is activated / deactivated by toggling the **// | + | ===== Software Project Setup ===== |
- | + | {{page> | |
- | The **//DAC Value//** slider is used to set the value to be loaded into the DAC register. The selected value is displayed in the numeric box next to the slider. While the communication with the board is activated the value will be sent to the DAC via SPI continuously. | + | |
- | + | ||
- | The **//Output Voltage//** numeric box will display the corresponding output voltage for the selected DAC value that can be measured on the VOUT connector. | + | |
- | + | ||
- | ===== Troubleshooting | + | |
- | + | ||
- | In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: | + | |
- | * Check that the evaluation board is powered as instructed in the board' | + | |
- | * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols// | + | |
- | * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again. | + | |
====== More information ====== | ====== More information ====== | ||
* [[resources: | * [[resources: | ||
{{page> | {{page> |