This document presents the steps to setup an environment for using the EVAL-AD5543SDZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5543SDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD5543SDZ Evaluation Board.
The EVAL-AD5543SDZ evaluation board is designed to help customers quickly prototype new AD5543 circuits and reduce design time. The EVAL-AD5543SDZ can also be used for the AD5553 by changing the number of bits written (14 bits) at the input.
The AD5543 is a precision, 16-bit, low power, current output, small form factor, digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. The applied external reference, VREF, determines the full-scale output current. An internal feedback resistor (RFB) facilitates the R-2R and temperature tracking for voltage conversion when combined with an external op amp. A serial data interface offers high speed, 3-wire, microcontroller-compatible inputs using serial data input (SDI), clock (CLK), and chip select (CS).
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
To power on the EVAL-AD5543 evaluation board, you need to provide +10V VDD, -10V VSS and +5V DVDD to J1 connector on the board.
The following commands were implemented in this version of EVAL-AD5543 reference project for Xilinx KC705 FPGA board.
|help?||Displays all available commands.|
|register=|| Writes to the DAC register. Accepted values:
0 .. 65535 - the value written to the DAC.
|register?||Displays last written value in the DAC register.|
|voltage=|| Sets the DAC output voltage. Accepted values:
-5000 .. 0 - desired output voltage in milivolts.
|voltage?||Displays last written voltage value to the DAC.|
Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral.
The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design: