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resources:fpga:xilinx:interposer:ad5542a [11 Sep 2013 10:52]
LucianS changed source code (without using Micrium uC-Probe), added Sofware Setup, remove programming with Impact
resources:fpga:xilinx:interposer:ad5542a [01 Oct 2013 14:23] (current)
LucianS remove reference_design_files.zip, changed driver and commands, changed the links to Github for driver and commands
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-  ​* {{:​resources:​fpga:​xilinx:​interposer:​cf_ad5542a_kc705.zip|Reference Design Files}} +  * **AD5542A Driver:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_drivers/​AD5446 
-  ​* **AD5542A Driver:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_drivers/​AD5542A +  * **AD5542A Commands:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_commands/​AD5446
-  * **AD5542A Commands:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_commands/​AD5542A+
   * **Xilinx Boards Common Drivers:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​platform_drivers/​Xilinx/​SDP_Common   * **Xilinx Boards Common Drivers:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​platform_drivers/​Xilinx/​SDP_Common
   * **EDK KC705 Reference project:** https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_sdp_kc705   * **EDK KC705 Reference project:** https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_sdp_kc705
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-To power on the EVAL-AD5542A evaluation board, you need to provide external +5V and -5V supply voltage.+To power on the EVAL-AD5542A evaluation board, you need to provide external +5V and -5V supply voltage ​to J1 connector on the board (LK8 position=B, LK9 position=A, LK7 position=A, LK3 position=B, LK2 position=A).
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-===== Quick start evaluation ===== 
-For a quick start evaluation, run the **download.bat** script located in the **SDK/​SDK_Workspace/​bin** folder provided within the Reference Design Files. ​ This script uses XMD to program the FPGA with the HDL Reference Design and download the Software Reference Design into the DDR. 
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-The **download.bat** script assumes that the Xilinx ISE Design Suite 14.6 is installed at this path: **C:/​Xilinx/​14.6**. If the installation path on your computer is different, please modify the script accordingly. 
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-If programming was successful, you should be seeing the command messages appear on the terminal. 
  
 ===== Reference Project Overview ===== ===== Reference Project Overview =====
resources/fpga/xilinx/interposer/ad5542a.txt · Last modified: 01 Oct 2013 14:23 by LucianS