This is an old revision of the document!
This document presents the steps to setup an environment for using the EVAL-AD5421SDZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit. Below is presented a picture of the EVAL-AD5421SDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD5421SDZ Evaluation Board.
The AD5421 is a complete, loop-powered, 4 mA to 20 mA digital-to-analog converter (DAC) designed to meet the needs of smart transmitter manufacturers in the industrial control industry. The DAC provides a high precision, fully integrated, low cost solution in a compact TSSOP package. The AD5421 includes a regulated voltage output that is used to power itself and other devices in the transmitter, and 1.22 V and 2.5 V references.
The EVAL-AD5421SDZ evaluation board is a member of a growing number of boards available for the SDP. Designed to help customers evaluate performance or quickly prototype new AD5421 circuits and reduce design time, the EVAL-AD5421SDZ evaluation board can operate in single-supply and dual-supply mode and incorporates an internal power supply powered from the USB.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
To power on the EVAL-AD5421 evaluation board, you need to provide external differential supply voltage from LOOP- to LOOP+ (for more information see: EVAL-AD5421SDZ evaluation board user guide).
The following commands were implemented in this version of EVAL-AD5421 reference project for Xilinx KC705 FPGA board.
|Displays all available commands.
|Resets the AD5421 device.
| Sets the output current. Accepted values:
4 .. 20 - the desired output current in milliamps.
|Displays the output current.
| Writes to the DAC register. Accepted values:
0 .. 65535 - the value written to the DAC.
|Displays the last written value to the DAC register.
| Sets the offset. Accepted values:
-32768 .. +32767 - digital offset adjustment(LSBs)
|Displays the offset.
| Sets the gain. Accepted values:
-65535 .. 0 - digital gain adjustment(LSBs)
|Displays the gain.
|Displays the die temperature.
|Displays the Vloop - COM voltage.
|Displays the Fault register.
Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design: