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resources:fpga:xilinx:interposer:ad5270 [28 Sep 2012 11:30] – Added common section for describing the evaluation setup and System Demonstration Platform Adrian Costinaresources:fpga:xilinx:interposer:ad5270 [10 Oct 2013 13:06] – changed source code (without Micrium uC-Probe), added Software Setup, remove programming with Impact Lucian Sin
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   * [[adi>AD5270]]   * [[adi>AD5270]]
 +  * [[adi>AD5271]]
  
 ===== Evaluation Boards ===== ===== Evaluation Boards =====
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>AD5270|EVAL-AD5270SDZ]]** evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the [[http://micrium.com/page/products/tools/probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5270SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>AD5270|EVAL-AD5270SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5270SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :resources:fpga:xilinx:interposer:img_ad5270.jpg }} {{ :resources:fpga:xilinx:interposer:img_ad5270.jpg }}
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   * [[adi>/static/imported-files/user_guides/UG-094.pdf|EVAL-AD5270SDZ evaluation board user guide]]   * [[adi>/static/imported-files/user_guides/UG-094.pdf|EVAL-AD5270SDZ evaluation board user guide]]
   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.6. 
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200. 
 +  * The EVAL-AD5270 reference project for Xilinx KC705 FPGA. 
  
 ===== Downloads ===== ===== Downloads =====
 +<WRAP round download 80%>
 +\\
 +  * **AD5270 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5270
 +  * **AD5270 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5270
 +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common
 +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
 +\\
 +</WRAP>
 +====== Run the Demonstration Project ======
  
-  * {{:resources:fpga:xilinx:interposer:ad5270_evalboard.zip|Reference Design Files}} +===== Hardware setup =====
- +
-The following table presents a short description the reference design archive contents. +
- +
-^ **Folder** ^ **Description** ^ +
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microblaze memory. | +
- +
-====== Run the Demonstration Project ======+
  
-{{page>ucprobe_common}}+<WRAP round important 80%> 
 +\\ 
 +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</WRAP>
  
-===== Demonstration Project User Interface =====+  * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. 
 +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD5270SDZ** evaluation board.+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5270 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **reset!**| Makes a software reset of the device. | 
 +| **rdac=** | Writes to the RDAC register. Accepted values:\\ 0 .. 1024 (0 .. 255 for AD5271) - the value written to RDAC. | 
 +| **rdac?** | Displays the last written value in RDAC register. | 
 +| **store!** | Stores the RDAC setting to 50-TP. | 
 +| **50TPValue?** | Displays the contents of the selected 50-TP register. Accepted values:\\ 0 .. 50 - selected 50-TP register. | 
 +| **50TPAddress?** | Displays the address of the last programmed 50-TP register. | 
 +| **power=** | Turns on/off the device. Accepted values:\\ 1 - normal mode.(default)\\ 0 - shutdown mode. | 
 +| **power?** | Displays the power status of the device. |
  
-{{ :resources:fpga:altera:bemicro:ad5270interface.png?700 }} 
  
-The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems. 
  
-The rheostat value is set by the //**"Rheostat Value"**// slider.+Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Troubleshooting =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +===== Software Project Setup ===== 
-  * Check that the evaluation board is powered as instructed in the board's user guide. +{{page>import_workspace}}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
   * [[resources:tools-software:linux-drivers:misc:dpot|AD5270 Digital Potentiometer Linux Driver]]   * [[resources:tools-software:linux-drivers:misc:dpot|AD5270 Digital Potentiometer Linux Driver]]
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad5270.txt · Last modified: 09 Jan 2021 00:48 by Robin Getz

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