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====== AD5172 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design ======

===== Supported Devices =====

  * [[adi>AD5172]]

===== Evaluation Boards =====

  * [[adi>EVAL-AD5172SDZ]]

====== Overview ======

This document presents the steps to setup an environment for using the **[[adi>AD5172|EVAL-AD5172SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5172SDZ Evaluation Board with the Xilinx KC705 board.

{{ :resources:fpga:xilinx:interposer:ad5172.jpg?400 }}

{{page>common_sdp}}

Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5172SDZ** Evaluation Board.

{{ :resources:fpga:altera:bemicro:ad5172_sdp1z.png?400 }}

The EVAL-AD5172SDZ evaluation board is a member of a growing number of boards available for the SDP. Designed to help customers evaluate performance or quickly prototype new AD5172 circuits and reduce design time, the EVAL-AD5172SDZ evaluation board can operate in single-supply and dual-supply mode and incorporates an internal power supply powered from the USB. The EVAL-AD5172SDZ evaluation board is designed to help customers quickly prototype new AD5172 circuits and reduce design time. The EVAL-AD5172SDZ incorporates several test circuits to evaluate the AD5172 performance.

The AD5172 is dual-channel, 256-position, one-time programmable (OTP) digital potentiometer that employs fuse link technology to achieve memory retention of resistance settings. OTP is a cost-effective alternative to EEMEM for users who do not need to program the digital potentiometer setting in memory more than once. This device performs the same electronic adjustment function as mechanical potentiometer or variable resistor but with enhanced resolution, solid-state reliability, and superior low temperature coefficient performance.

===== More information =====
  * [[adi>AD5172|AD5172 Product Info]] - pricing, samples, datasheet
  * [[adi>/static/imported-files/user_guides/UG-243.pdf|EVAL-AD5172SDZ evaluation board user guide]]
  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]

====== Getting Started ======

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

===== Required Hardware =====

  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
  * FMC-SDP adapter board
  * **EVAL-AD5172** evaluation board

===== Required Software =====

  * Xilinx ISE 14.6. 
  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.

===== Downloads =====
<WRAP round download 80%>
\\
  * **AD5172 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5172
  * **AD5172 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5172
  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common
  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
\\
</WRAP>

===== Hardware setup =====

<WRAP round important 80%>
\\
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
</WRAP>

  * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

===== Reference Project Overview =====
The following commands were implemented in this version of EVAL-AD5172 reference project for Xilinx KC705 FPGA board.
^ Command ^ Description ^
| **help?** | Displays all available commands. |
| **rdac=** | Load the wiper register with a give value. Accepted values:\\ channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register.\\ value:\\ 0 .. 255 - value to be written in register. |
| **rdac?** | Read back the value of the wiper register. Accepted values:\\ channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register. |
| **wbuf1?** | Read back the value of the Wiper Buffer in voltage. (VDD=3.2V) |
| **shutdown=** | Shutdown connects wiper to B terminal and open circuits the A terminal. channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register. |
| **shutdown?** | Notify about the state of the selected RDAC. channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register. |

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral.
{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}

===== Software Project Setup =====
{{page>import_workspace}}

====== More information ======
  * [[resources:tools-software:linux-drivers:misc:dpot|AD5172 Digital Potentiometer Linux Driver]]
{{page>ez_common}}
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