Wiki

Analog Devices Wiki

English
English
简体中文
简体中文
日本語
日本語
Руccкий
Руccкий

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Last revisionBoth sides next revision
resources:fpga:xilinx:interposer:ad5111 [28 Sep 2012 11:27] – Added common section for describing the evaluation setup and System Demonstration Platform Adrian Costinaresources:fpga:xilinx:interposer:ad5111 [07 Oct 2013 09:34] – changed source code (without Micrium uC-Probe), added Software Setup, remove programming with Impact Lucian Sin
Line 12: Line 12:
 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>AD5111|EVAL-AD5111SDZ]]** evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the [[http://micrium.com/page/products/tools/probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5111SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>AD5111|EVAL-AD5111SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5111SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :resources:fpga:xilinx:interposer:ad5111_kc705.jpg?400 }} {{ :resources:fpga:xilinx:interposer:ad5111_kc705.jpg?400 }}
Line 33: Line 33:
   * [[adi>/static/imported-files/user_guides/UG-323.pdf|EVAL-AD5111SDZ evaluation board user guide]]   * [[adi>/static/imported-files/user_guides/UG-323.pdf|EVAL-AD5111SDZ evaluation board user guide]]
   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
Line 47: Line 46:
 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.6. 
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200. 
 +  * The EVAL-AD5111 reference project for Xilinx KC705 FPGA. 
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:fpga:xilinx:interposer:ad5111_evalboard.zip|Reference Design Files}} +\\ 
- +  * **AD5111 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5111 
-The following table presents a short description the reference design archive contents. +  * **AD5111 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5111 
- +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common 
-^ **Folder** ^ **Description** ^ +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +\\ 
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +</WRAP>
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
-{{page>ucprobe_common}} +===== Hardware setup =====
- +
-===== Demonstration Project User Interface ===== +
- +
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD5111SDZ** evaluation board.+
  
-{{ :resources:fpga:xilinx:interposer:ad5111interface.jpg?700 }}+<WRAP round important 80%> 
 +\\ 
 +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</WRAP>
  
-**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems.+  * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. 
 +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-**Section B** is used to set the operation mode, changing between manual increment or high speed digital increment.+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5111 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **increment=** | Increases the resistor value with a number of steps. Accepted values:\\ 0 .. 128 - number of steps to increment RDAC value. | 
 +| **decrement=** | Decreases the resistor value with a number of steps. Accepted values:\\ 0 .. 128 - number of steps to decrement RDAC value. | 
 +| **store!** | Device memorizes the current RDAC value in EEPROM. | 
 +| **shutdown!** | Device enters in shutdown mode. |
  
-**Section C** is used to set the value programmed in high speed mode, using the slider provided. 
  
-**Section D** is used to simulate a buton. By clicking it, you can increase/decrease the resistor value, based on the Up/Down switch position.+Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-**Section E** displays the current position of the wiper (between 0 and 128) +The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
-===== Troubleshooting =====+{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +===== Software Project Setup ===== 
-  * Check that the evaluation board is powered as instructed in the board's user guide. +{{page>import_workspace}}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad5111.txt · Last modified: 09 Jan 2021 00:39 by Robin Getz

Page Tools