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resources:fpga:xilinx:fmc:ad9467 [15 Nov 2019 10:21] – Update block diagram Stanca-Florina Pop | resources:fpga:xilinx:fmc:ad9467 [09 Jan 2021 00:39] – user interwiki links Robin Getz | ||
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===== Evaluation Board Hardware ===== | ===== Evaluation Board Hardware ===== | ||
- | To find out more information about the [[http:// | + | To find out more information about the [[adi>en/ |
{{: | {{: | ||
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The evaluation board can be set up to be clocked from the **crystal oscillator**, | The evaluation board can be set up to be clocked from the **crystal oscillator**, | ||
- | A **differential LVPECL or LVDS clock driver** can also be used to clock the ADC input using the [[http:// | + | A **differential LVPECL or LVDS clock driver** can also be used to clock the ADC input using the [[adi>media/ |
<WRAP round important 100%> | <WRAP round important 100%> | ||
\\ | \\ | ||
- | Please make sure you have removed or inserted the corresponding components on the board to select the desired clock path. The schematic of the board can be found at the [[http:// | + | Please make sure you have removed or inserted the corresponding components on the board to select the desired clock path. The schematic of the board can be found at the [[/ |
</ | </ | ||
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==== Required Software ==== | ==== Required Software ==== | ||
- | * We're upgrade the Xilinx tools on every release. The supported version number can be found in our HDL [[https:// | + | * We're upgrade the Xilinx tools on every release. The supported version number can be found in our HDL [[/ |
* A UART terminal (Tera Term/ | * A UART terminal (Tera Term/ | ||
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<WRAP round info 100%> | <WRAP round info 100%> | ||
- | Instruction about how to build the HDL design and generate a bit stream can be found [[https:// | + | Instruction about how to build the HDL design and generate a bit stream can be found [[/ |
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=== AD9467 FMC Card block diagram === | === AD9467 FMC Card block diagram === | ||
- | {{: | + | {{: |
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* Capture data from the AD9467 using DMA transfers | * Capture data from the AD9467 using DMA transfers | ||
- | The software project contains 3 components: the AD9467-FMC-EBZ reference design files, the AD9467 driver and the AD9517 driver. All the components have to be downloaded from the links provided in the [[http:// | + | The software project contains 3 components: the AD9467-FMC-EBZ reference design files, the AD9467 driver and the AD9517 driver. All the components have to be downloaded from the links provided in the [[/ |
==== AD9467 Software Driver ==== | ==== AD9467 Software Driver ==== | ||
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<WRAP round info 100%> | <WRAP round info 100%> | ||
- | Instruction about how to create a software application can be found [[http:// | + | Instruction about how to create a software application can be found [[/ |
</ | </ | ||
- | The exact location of the no-OS source files can be found in the [[http:// | + | The exact location of the no-OS source files can be found in the [[/ |
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===== Downloads ===== | ===== Downloads ===== | ||
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* {{: | * {{: | ||
* {{: | * {{: | ||
- | * {{: | + | * {{ : |
**Note:** C302 and C303 are not installed as indicated in the Schematic and BOM. | **Note:** C302 and C303 are not installed as indicated in the Schematic and BOM. | ||
</ | </ |