This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revisionNext revisionBoth sides next revision | ||
resources:fpga:xilinx:fmc:ad9467 [16 Jul 2015 09:39] – set downloads links to release 2014_R2 Lucian Sin | resources:fpga:xilinx:fmc:ad9467 [09 Jan 2021 00:39] – user interwiki links Robin Getz | ||
---|---|---|---|
Line 7: | Line 7: | ||
===== Evaluation Board Hardware ===== | ===== Evaluation Board Hardware ===== | ||
- | To find out more information about the [[http:// | + | To find out more information about the [[adi>en/ |
{{: | {{: | ||
Line 19: | Line 19: | ||
The evaluation board can be set up to be clocked from the **crystal oscillator**, | The evaluation board can be set up to be clocked from the **crystal oscillator**, | ||
- | A **differential LVPECL or LVDS clock driver** can also be used to clock the ADC input using the [[http:// | + | A **differential LVPECL or LVDS clock driver** can also be used to clock the ADC input using the [[adi>media/ |
<WRAP round important 100%> | <WRAP round important 100%> | ||
\\ | \\ | ||
- | Please make sure you have removed or inserted the corresponding components on the board to select the desired clock path. The schematic of the board can be found at the [[http:// | + | Please make sure you have removed or inserted the corresponding components on the board to select the desired clock path. The schematic of the board can be found at the [[/ |
</ | </ | ||
===== Supported Carriers ===== | ===== Supported Carriers ===== | ||
- | * [[xilinx> | + | * [[xilinx> |
* [[http:// | * [[http:// | ||
Line 37: | Line 37: | ||
==== Required Software ==== | ==== Required Software ==== | ||
- | * We're upgrade the Xilinx tools on every release. The supported version number can be found in our [[https://github.com/analogdevicesinc/hdl/ | + | * We're upgrade the Xilinx tools on every release. The supported version number can be found in our HDL [[/resources/fpga/docs/releases |
* A UART terminal (Tera Term/ | * A UART terminal (Tera Term/ | ||
Line 43: | Line 43: | ||
<WRAP round info 100%> | <WRAP round info 100%> | ||
- | Instruction about how to build the HDL design and generate a bit stream, can be found [[http:// | + | Instruction about how to build the HDL design and generate a bit stream can be found [[/ |
</ | </ | ||
Line 50: | Line 50: | ||
The reference design is built on a ARM/ | The reference design is built on a ARM/ | ||
- | {{: | + | === Xilinx block diagram === |
+ | {{: | ||
+ | |||
+ | === AD9467 FMC Card block diagram | ||
+ | {{: | ||
Through an SPI interface, the software can access the AD9467/ | Through an SPI interface, the software can access the AD9467/ | ||
Line 70: | Line 75: | ||
* Capture data from the AD9467 using DMA transfers | * Capture data from the AD9467 using DMA transfers | ||
- | The software project contains 3 components: the AD9467-FMC-EBZ reference design files, the AD9467 driver and the AD9517 driver. All the components have to be downloaded from the links provided in the [[http:// | + | The software project contains 3 components: the AD9467-FMC-EBZ reference design files, the AD9467 driver and the AD9517 driver. All the components have to be downloaded from the links provided in the [[/ |
==== AD9467 Software Driver ==== | ==== AD9467 Software Driver ==== | ||
Line 103: | Line 109: | ||
<WRAP round info 100%> | <WRAP round info 100%> | ||
- | Instruction about how to create a software application can be found [[http:// | + | Instruction about how to create a software application can be found [[/ |
</ | </ | ||
- | The exact location of the no-OS source files can be found in the [[http:// | + | The exact location of the no-OS source files can be found in the [[/ |
| | ||
===== Downloads ===== | ===== Downloads ===== | ||
- | The HDL Reference Designs and the no-OS Software can be downloaded from the Analog Devices github. The latest stable version is **Release 2014_R2**. | + | The HDL Reference Designs and the no-OS Software can be downloaded from the Analog Devices github. |
**HDL Reference Designs:** | **HDL Reference Designs:** | ||
<WRAP round download> | <WRAP round download> | ||
- | **Release 2014_R2** | + | **latest release** |
- | * **ZED HDL Reference Design: ** https:// | + | * **ZED HDL Reference Design: ** https:// |
- | * **KC705 HDL Reference Design: ** https:// | + | * **KC705 HDL Reference Design: ** https:// |
</ | </ | ||
**no-OS Software:** | **no-OS Software:** | ||
<WRAP round download> | <WRAP round download> | ||
- | **Release 2014_R2** | + | **latest release** |
- | * **AD9467 Driver: | + | * **AD9467 Driver: |
- | * **AD9517 Driver: | + | * **AD9517 Driver: |
- | * **AD9467-FMC-EBZ Reference Design: ** https:// | + | * **AD9467-FMC-EBZ Reference Design: ** https:// |
</ | </ | ||
Line 132: | Line 138: | ||
* {{: | * {{: | ||
* {{: | * {{: | ||
- | * {{: | + | * {{ : |
**Note:** C302 and C303 are not installed as indicated in the Schematic and BOM. | **Note:** C302 and C303 are not installed as indicated in the Schematic and BOM. | ||
</ | </ | ||
- | |||
===== More information ===== | ===== More information ===== | ||
+ | |||
<WRAP round help 80%> | <WRAP round help 80%> | ||
\\ | \\ | ||
[[ez> | [[ez> | ||
</ | </ |