Wiki

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
resources:fpga:xilinx:fmc:ad9434 [19 Mar 2018 17:29]
Adrian Costina Added link to HDL page. Explicitly made the ML605 project obsolete
resources:fpga:xilinx:fmc:ad9434 [09 Jan 2021 00:39]
Robin Getz user interwiki links
Line 89: Line 89:
 </​WRAP>​ </​WRAP>​
  
-Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[http://​wiki.analog.com/​resources/​eval/​user-guides/​ad-fmcomms1-ebz/​reference_hdl|generating Xilinx netlist/​verilog files from xco files]] for details.+Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[/​resources/​eval/​user-guides/​ad-fmcomms1-ebz/​reference_hdl|generating Xilinx netlist/​verilog files from xco files]] for details.
  
 ==== Tar File Contents ==== ==== Tar File Contents ====
  
-The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[http://www.xilinx.com/support/​documentation/​dt_edk_edk13-2.htm|Xilinx EDK documentation]] for details.+The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[xilinx>support/​documentation/​dt_edk_edk13-2.htm|Xilinx EDK documentation]] for details.
  
 | license.txt | ADI license & copyright information. | | license.txt | ADI license & copyright information. |
resources/fpga/xilinx/fmc/ad9434.txt · Last modified: 09 Jan 2021 00:39 by Robin Getz