Wiki

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
resources:fpga:xilinx:fmc:ad-fmcadc7-ebz [01 Apr 2016 20:59] rejeesh kuttyresources:fpga:xilinx:fmc:ad-fmcadc7-ebz [22 Feb 2017 19:44] (current) – Canonical spelling of JESD204B Lars-Peter Clausen
Line 4: Line 4:
 ===== Functional Overview ===== ===== Functional Overview =====
  
-The FMCADC7 reference design is a processor based (ARM, NIOS-II or Microblaze) embedded system. The device interfaces to the FPGA transceivers followed by the individual JESD and ADC cores. The cores are programmable through an AXI-lite interface. The samples are passed to the system memory (DDR).+The FMCADC7 reference design is a processor based (ARM, NIOS-II or Microblaze) embedded system. The device interfaces to the FPGA transceivers followed by the individual JESD204B and ADC cores. The cores are programmable through an AXI-lite interface. The samples are passed to the system memory (DDR).
  
 ===== Control and SPI ===== ===== Control and SPI =====
resources/fpga/xilinx/fmc/ad-fmcadc7-ebz.txt · Last modified: 22 Feb 2017 19:44 by Lars-Peter Clausen