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resources:fpga:peripherals:spi_engine [13 Oct 2021 08:45] – Edit footer Iulia Moldovanresources:fpga:peripherals:spi_engine [22 Dec 2022 13:07] (current) – remove broken backlinks sergiu arpadi
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   * [[resources:tools-software:linux-drivers:spi:spi_engine|Linux Driver]]: Linux driver for the SPI Engine framework   * [[resources:tools-software:linux-drivers:spi:spi_engine|Linux Driver]]: Linux driver for the SPI Engine framework
-  * [[resources:tools-software:uc-drivers:spi_engine|No-OS bare-metal Driver]]: No-OS bare-metal driver +  * [[.:spi_engine:instruction_format|SPI Engine Instruction Format]]: Overview of the SPI Engine Instruction format
-  * [[SPI Engine Compiler]]: Compiler for generating SPI Engine bytecode +
-    * [[.:spi_engine:instruction_format|SPI Engine Instruction Format]]: Overview of the SPI Engine Instruction format+
  
  
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   * [[resources:eval:user-guides:ad7768-1]] - The AD7768-1 is a low power, high performance, Σ-Δ analog-to-digital converter (ADC).   * [[resources:eval:user-guides:ad7768-1]] - The AD7768-1 is a low power, high performance, Σ-Δ analog-to-digital converter (ADC).
   * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/ad40xx_fmc|AD40xx-FMC]] - Evaluation Board for the AD4000 Series 16-/18-/20-Bit Precision SAR ADCs   * [[https://github.com/analogdevicesinc/hdl/tree/master/projects/ad40xx_fmc|AD40xx-FMC]] - Evaluation Board for the AD4000 Series 16-/18-/20-Bit Precision SAR ADCs
 +  * [[:resources:eval:user-guides:ad469x|AD469x]] - 16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC
 +  * [[:resources:eval:user-guides:ad463x:hdl|AD4630-24 / AD4030-24 / AD4630-16]] - 16/24-Bit, 2 MSPS Single or Dual Channel SAR ADC
  
- +===== Additional Resources =====
-===== Additional Documents =====+
  
   * {{:resources:fpga:peripherals:spi-engine3.pdf|Presentation: SPI Engine Design Philosophy}}   * {{:resources:fpga:peripherals:spi-engine3.pdf|Presentation: SPI Engine Design Philosophy}}
 +  * [[:resources:fpga:peripherals:spi_engine:tutorial|PulSAR ADC Tutorial]]
  
 {{navigation HDL User Guide#../docs/ip_cores|IP cores#../docs/hdl|Main page#../docs/tips|Using and modifying the HDL design}} {{navigation HDL User Guide#../docs/ip_cores|IP cores#../docs/hdl|Main page#../docs/tips|Using and modifying the HDL design}}
resources/fpga/peripherals/spi_engine.txt · Last modified: 22 Dec 2022 13:07 by sergiu arpadi