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resources:fpga:peripherals:spi_engine:offload [27 May 2015 14:19] Lars-Peter Clausen [Configuration Parameters] |
resources:fpga:peripherals:spi_engine:offload [11 May 2018 17:46] Istvan Csomortani [Files] Switch to master |
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^ Name ^ Description ^ | ^ Name ^ Description ^ | ||
- | | [[github>hdl?dev/library/spi_engine/spi_engine_offload/spi_engine_offload.v|spi_engine_offload.v]] | Verilog source for the peripheral. | | + | | [[github>hdl?master/library/spi_engine/spi_engine_offload/spi_engine_offload.v|spi_engine_offload.v]] | Verilog source for the peripheral. | |
- | | [[github>hdl?dev/library/spi_engine/spi_engine_offload/spi_engine_offload_ip.tcl|spi_engine_offload_ip.tcl]] | TCL script to generate the Vivado IP-integrator project for the peripheral. | | + | | [[github>hdl?master/library/spi_engine/spi_engine_offload/spi_engine_offload_ip.tcl|spi_engine_offload_ip.tcl]] | TCL script to generate the Vivado IP-integrator project for the peripheral. | |
===== Configuration Parameters ===== | ===== Configuration Parameters ===== | ||
^ Name ^ Description ^ Default ^ | ^ Name ^ Description ^ Default ^ | ||
- | | ''SPI_CLK_ASYNC'' | If set to 1 the ctrl_clk and spi_clk are assumed to be asynchronous | 0 | | + | | ''SPI_CLK_ASYNC'' | If set to 1 the ''ctrl_clk'' and ''spi_clk'' are assumed to be asynchronous | 0 | |
| ''CMD_MEM_ADDR_WIDTH'' | Configures the size of the command stream storage. The size is ''2<nowiki>**</nowiki>CMD_MEM_ADDR_WIDTH'' entries. | 4 | | | ''CMD_MEM_ADDR_WIDTH'' | Configures the size of the command stream storage. The size is ''2<nowiki>**</nowiki>CMD_MEM_ADDR_WIDTH'' entries. | 4 | | ||
| ''SDO_MEM_ADDR_WIDTH'' | Configures the size of the SDO data stream storage. The size is ''2<nowiki>**</nowiki>SDO_MEM_ADDR_WIDTH'' entries. | 4 | | | ''SDO_MEM_ADDR_WIDTH'' | Configures the size of the SDO data stream storage. The size is ''2<nowiki>**</nowiki>SDO_MEM_ADDR_WIDTH'' entries. | 4 | |