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| resources:fpga:peripherals:jesd204:axi_jesd204_tx [20 Apr 2020 13:56] – [JESD204B/C Link Transmit Peripheral] Laszlo Nagy | resources:fpga:peripherals:jesd204:axi_jesd204_tx [05 Jun 2020 12:02] – [Configuration Interface] Laszlo Nagy |
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| The ''LINK_DISABLE'' (''0x0c0'') register is used to control the link state and switch between enabled and disabled. While the link is disabled its state machine will remain in reset and it will not react to any external event like the ''SYSREF'' or ''SYNC~'' signals. | The ''LINK_DISABLE'' (''0x0c0'') register is used to control the link state and switch between enabled and disabled. While the link is disabled its state machine will remain in reset and it will not react to any external event like the ''SYSREF'' or ''SYNC~'' signals. |
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| Writing a 0 to the ''LINK_DISABLE'' register will enable the link. While the link state is changing from disabled to enabled it will go through a short initialization procedure, which will take a few clock cycles. To check whether the initialization procedure has completed and the link is fully operational the ''LINK_STATE'' (''0x0c4'') register can be checked. This register will contain a 1 when the link is fully enabled and will contain a 0 while it is disabled or going through the initialization procedure. | Writing a 0 to the ''LINK_DISABLE'' register will enable the link. While the link state is changing from disabled to enabled it will go through a short initialization procedure, which will take a few clock cycles. To check whether the initialization procedure has completed and the link is fully operational the ''LINK_STATE'' (''0x0c4'') register can be checked. This register will contain a 0 when the link is fully enabled and will contain a 1 while it is disabled or going through the initialization procedure. |
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| Writing a 1 to the ''LINK_DISABLE'' register will immediately disable the link. | Writing a 1 to the ''LINK_DISABLE'' register will immediately disable the link. |
