This version (11 Aug 2021 20:20) was approved by Travis Collins.The Previously approved version (14 Feb 2021 22:27) is available.
Table of Contents
Build no-OS with GNU make
This guide provides some quick instructions on how to build and run the no-OS on almost all of the supported platforms.
Be sure you are using the latest release version and you have the corresponding branches for both HDL and no-OS(Release notes).
Building the HDL
ADI does not distribute the bit/elf files of these projects. They must be built from the sources. The HDL User Guide provides detailed information and steps to build the HDL project on your desired carrier. The build flow is developed around GNU make. You may use a Windows or Linux OS, but do NOT seek OS- specific support. The prerequisite to the building process is that you are able to run 'quartus', 'vivado' and 'make' all from a shell (Cygwin or Linux).
Building the HDL is as simple as running make on your desired project and carrier.
hdl/projects/daq3/kcu105> make hdl/projects/daq3/zc706> make
For Intel nios2 based processor projects you have to turn off the MMU (Memory Management Unit used for Linux OS) when building the HDL.
hdl/projects/daq3/a10gx> make MMU=0
We strongly recommend having a clone of no-Os and HDL in the same folder:
~/github/hdl/ ~/github/no-OS/
In every project folder, you can find a separate subfolder for each supported carrier. In each carrier folder, there is a Makefile which points to the bit files and HDL deliverables (system_top.hdf/project_name.sof) and other makefiles (*.mk) containing the software dependencies.
Building the software
Change your current directory to your targeted project and run make:
[~] cd fmcdaq2/zc706
[~] make
See Troubleshooting section for guideline how to solve make related issues.
Running the software
Make sure that the FPGA is powered on and connected to the PC and then run the command:
[~] make run
The make run will downloads the bitstream on the FPGA and after that program the board with the elf file.
The software is started before the memory debugger disconnects.
Evaluating the result
After the software has been run on the FPGA, run the command:
[~] make capture
By default, the software captures (in case of ADC based projects) the data received from the device in the RAM.
rx_xfer.start_address = *_MEM_BASEADDR + OFFSET; rx_xfer.no_of_samples = value; dmac_start_transaction(ad_core_dma);
These values differ depending on the architecture and device.
The Makefiles have these parameters initialized with default values:
The number of samples is specified in the project's common Makefile. (ex: fmcadc4)
The script will write a capture_chx.csv file for every channel.
In the case of an RF device which has I and Q data for each channel, the number of capture_chx.csv files will double.
For example, for fmcomms2(AD9361: 2RF channels):
| fmcomms2 | ||
|---|---|---|
| channel1 | data I | capture_ch1.csv |
| data Q | capture_ch2.csv | |
| channel2 | data I | capture_ch3.csv |
| data Q | capture_ch4.csv | |
Clean the workspace
[~] make clean
Troubleshooting
make: *** No rule to make target `../../../hdl/projects/daq2/vc707/daq2_vc707.sdk/system_top.hdf', needed by `hw/system_top.bit'. Stop.
The HDL deliverables cannot be found. Maybe the targeted HDL project is not built, or the defined path is not valid. Make sure, that you build the HDL before running the no-OS or specify the location of the HDL deliverables explicitly.
- Specify HDL location:
For Xilinx
[~] make HARDWARE=/<path_to_hdf>/system_top.hdf
For Intel
[~] make M_SOPCINFO_FILE=/<path_to_sopcinfo>/system_bd.sopcinfo
Understanding/Modifying things
The best place to start in the no-OS main function in “project/project_name.c”. It shows how individual components of a data path chain are initialized and programmed for the application. After you have the default setup working, feel free to add your own customization routines and/or signal processing functions to either HDL or no-OS.
Navigation - Build no-OS with GNU make
resources/fpga/no-os_make/software_setup.txt · Last modified: 11 Aug 2021 20:20 by Travis Collins