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| resources:fpga:no-os_make:software_setup [21 Mar 2018 12:56] – Change title to Build no-OS with GNU make Istvan Csomortani | resources:fpga:no-os_make:software_setup [11 Aug 2021 20:20] (current) – Update HDF variable def for Xilinx Travis Collins | ||
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| ====== Build no-OS with GNU make ====== | ====== Build no-OS with GNU make ====== | ||
| - | Be sure you are using the latest release version | + | This guide provides some quick instructions on how to build and run the no-OS on almost all of the supported platforms. |
| - | We strongly recommend having a [[https://wiki.analog.com/resources/fpga/docs/git|clone]] of no-Os and hdl in the same folder: | + | Be sure you are using the latest release version and you have the corresponding branches for both HDL and no-OS([[https://github.com/analogdevicesinc/hdl/releases|Release notes]]). |
| - | ~/ | + | |
| - | ~/ | + | |
| - | The build flow is based on [[https:// | + | ==== Building the HDL ==== |
| - | In every project | + | ADI does not distribute the bit/elf files of these projects. They must be built from the sources. The [[resources: |
| - | ===== Building the bare metal software ===== | + | Building the HDL is as simple as running |
| - | Do a | + | |
| - | | + | |
| - | in the carrier | + | |
| - | \\ | + | |
| - | [[# | + | |
| + | < | ||
| + | hdl/ | ||
| + | hdl/ | ||
| + | </ | ||
| - | ===== Running | + | <note important> |
| + | For Intel nios2 based processor projects you have to turn off the MMU (Memory Management Unit used for Linux OS) when building the HDL. | ||
| + | </ | ||
| - | Make sure you have the FPGA connected to your PC and then run the command: | + | < |
| + | hdl/ | ||
| + | </ | ||
| - | | + | We strongly recommend having a [[/ |
| + | |||
| + | < | ||
| + | ~/ | ||
| + | ~/ | ||
| + | </ | ||
| + | |||
| + | In every project folder, you can find a separate subfolder for each supported carrier. In each carrier folder, there is a Makefile which points to the bit files and HDL deliverables (system_top.hdf/ | ||
| + | |||
| + | |||
| + | ===== Building the software ===== | ||
| + | |||
| + | Change your current directory to your targeted project and run make: | ||
| + | < | ||
| + | [~] cd fmcdaq2/ | ||
| + | [~] make | ||
| + | </ | ||
| + | |||
| + | See [[# | ||
| + | |||
| + | ===== Running the software ===== | ||
| + | |||
| + | Make sure that the FPGA is powered on and connected to the PC and then run the command: | ||
| + | < | ||
| + | [~] make run | ||
| + | </ | ||
| + | |||
| + | The **make run** will downloads the bitstream on the FPGA and after that program the board with the elf file. | ||
| - | The above command downloads the bitstream or the raw binary file on the FPGA and after that the elf file. | ||
| - | \\ | ||
| The software is started before the memory debugger disconnects. | The software is started before the memory debugger disconnects. | ||
| | | ||
| Line 32: | Line 58: | ||
| After the software has been run on the FPGA, run the command: | After the software has been run on the FPGA, run the command: | ||
| - | + | < | |
| - | make capture | + | |
| + | </ | ||
| By default, the software captures (in case of ADC based projects) the data received from the device in the RAM. | By default, the software captures (in case of ADC based projects) the data received from the device in the RAM. | ||
| + | < | ||
| rx_xfer.start_address = *_MEM_BASEADDR + OFFSET; | rx_xfer.start_address = *_MEM_BASEADDR + OFFSET; | ||
| rx_xfer.no_of_samples = value; | rx_xfer.no_of_samples = value; | ||
| dmac_start_transaction(ad_core_dma); | dmac_start_transaction(ad_core_dma); | ||
| - | | + | </ |
| These values differ depending on the architecture and device. | These values differ depending on the architecture and device. | ||
| Line 49: | Line 76: | ||
| * [[https:// | * [[https:// | ||
| - | For projects that have more than one channel or require a different | + | The number of samples |
| < | < | ||
| Line 64: | Line 91: | ||
| ===== Clean the workspace ===== | ===== Clean the workspace ===== | ||
| - | + | < | |
| - | make clean | + | |
| + | </ | ||
| ===== Troubleshooting ===== | ===== Troubleshooting ===== | ||
| - | If you get | + | < |
| make: *** No rule to make target `../ | make: *** No rule to make target `../ | ||
| - | + | </code> | |
| - | Your hdl in not build or the folder structure is not the one recommended at the beginning of this page, you have to build/specify hdl location. | + | |
| - | * [[https:// | + | The HDL deliverables cannot be found. Maybe the targeted HDL project is not built, or the defined path is not valid. Make sure, that you build the HDL before running the no-OS or specify the location of the HDL deliverables explicitly. |
| - | * Specify | + | |
| + | |||
| + | | ||
| For Xilinx | For Xilinx | ||
| - | | + | < |
| + | [~] make HARDWARE=/<path_to_hdf>/ | ||
| + | </ | ||
| For Intel | For Intel | ||
| - | | + | < |
| + | [~] make M_SOPCINFO_FILE=/ | ||
| + | </ | ||
| + | |||
| + | ===== Understanding/Modifying things ===== | ||
| + | |||
| + | The best place to start in the no-OS main function in " | ||
| + | |||
| + | |||
| - | | + | {{navigation Build no-OS with GNU make# |
resources/fpga/no-os_make/software_setup.1521633408.txt.gz · Last modified: 21 Mar 2018 12:56 by Istvan Csomortani