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resources:fpga:docs:axi_tdd [12 Oct 2021 16:54] – Edit footer Iulia Moldovanresources:fpga:docs:axi_tdd [05 Oct 2022 11:36] – [Generic Time-Division Duplexing Controller] Ionut Podgoreanu
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-====== Timing-Division Duplexing Controller ======+====== Generic Time-Division Duplexing Controller ======
  
 TDD (Time-Division Duplex) mode allows the user to control the time period of the receive and transmit bursts.  TDD (Time-Division Duplex) mode allows the user to control the time period of the receive and transmit bursts. 
  
-The AXI TDD engine is a relatively simple peripheral originally intended to be used for TDD (wireless) communication systems. It solves the synchronization issue when transmitting and receiving multiple frames of data through multiple buffers. +The generic TDD controller is in essence waveform generator capable of addressing RF applications which require Time Division Duplexing, as well as controlling other modules of general applications through its dedicated 32 channel outputs.
  
 +The reason of creating the generic TDD controller was to reduce the naming confusion around the existing repurposed [[resources:eval:user-guides:ad-pzsdr2400tdd-eb:reference_hdl#TDD Controller|TDD core]] built for AD9361, as well as expanding its number of output channels for systems which require more than six controlling signals.
 ===== Features ===== ===== Features =====
  
resources/fpga/docs/axi_tdd.txt · Last modified: 27 Jul 2023 21:56 by Ionut Podgoreanu