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resources:fpga:docs:axi_logic_analyzer [04 Sep 2020 12:24]
Andrei Grozav Instrument sync update
resources:fpga:docs:axi_logic_analyzer [09 Jan 2021 00:39]
Robin Getz user interwiki links
Line 138: Line 138:
 ==== References ==== ==== References ====
   * [[https://​github.com/​analogdevicesinc/​hdl/​tree/​master/​library/​axi_logic_analyzer | AXI_LOGIC_ANALYZER IP source code]] \\   * [[https://​github.com/​analogdevicesinc/​hdl/​tree/​master/​library/​axi_logic_analyzer | AXI_LOGIC_ANALYZER IP source code]] \\
-  * [[https://​wiki.analog.com/​resources/​fpga/​docs/​arch | ADI Reference designs architecture ]] \\+  * [[/​resources/​fpga/​docs/​arch | ADI Reference designs architecture ]] \\
   * [[https://​github.com/​analogdevicesinc/​linux/​ | ADI Linux repository ]]   * [[https://​github.com/​analogdevicesinc/​linux/​ | ADI Linux repository ]]
-  * [[http://www.xilinx.com/support/​documentation/​user_guides/​ug471_7Series_SelectIO.pdf | 7 Series IO]] \\ +  * [[xilinx>support/​documentation/​user_guides/​ug471_7Series_SelectIO.pdf | 7 Series IO]] \\ 
-  * [[http://www.xilinx.com/support/​documentation/​user_guides/​ug472_7Series_Clocking.pdf | 7 Series Clocking]] \\ +  * [[xilinx>support/​documentation/​user_guides/​ug472_7Series_Clocking.pdf | 7 Series Clocking]] \\ 
-  * [[http://www.xilinx.com/support/​documentation/​sw_manuals/​xilinx2016_2/​ug953-vivado-7series-libraries.pdf | 7 Series libraries]] \\+  * [[xilinx>support/​documentation/​sw_manuals/​xilinx2016_2/​ug953-vivado-7series-libraries.pdf | 7 Series libraries]] \\
  
 {{navigation #axi_ip|AXI IP#hdl|Main page#​tips|Tips}} {{navigation #axi_ip|AXI IP#hdl|Main page#​tips|Tips}}
resources/fpga/docs/axi_logic_analyzer.txt · Last modified: 09 Jan 2021 00:39 by Robin Getz