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Fan Control IP Core

The axi_fan_control IP core is a software programmable fan controller.

Block Diagram

Introduction

The purpose of this IP core is to control the fan used for the cooling of a Xilinx Zynq Ultrascale+ MPSoC without the need of any external temperature sensors. To achieve this, the IP core uses the PL SYSMONE4 primitive to obtain the PL temperature via the DRP interface. Based on the temperature readings it then outputs a PWM signal to control the fan rotation accordingly. The tacho signal coming from the fan is also measured and evaluated to ensure that the RPM is correct and the fan is working properly.

Configuration Parameter

Name Description Default Value
PWM_FREQUENCY_HZ Frequency of the PWM signal 5000
THRESH_PWM_000 Temperature threshold 0x8f5e (5°C)
THRESH_PWM_025_L Temperature threshold 0x96f0 (20°C)
THRESH_PWM_025_H Temperature threshold 0xa0ff (40°C)
THRESH_PWM_050_L Temperature threshold 0xab03 (60°C)
THRESH_PWM_050_H Temperature threshold 0xb00a (70°C)
THRESH_PWM_075_L Temperature threshold 0xb510 (80°C)
THRESH_PWM_075_H Temperature threshold 0xba17 (90°C)
THRESH_PWM_100 Temperature threshold 0xbc9b (95°C)

Signal and Interface Pins

Interface Pin Type Description
tacho input Tacho generator input
pwm output PWM control signal
irq output Interrupt signal
s_axi AXI Slave Memory Map interface
s_axi_aclk input AXI clock
s_axi_aresetn input AXI reset

Register Map

Fan Controller (axi_fan_control)

Click to expand regmap

Clocking

The IP core runs on the AXI clock and requires a frequency of 100MHz.

Theory of Operation

The main features of this IP core are its independent operation and the fact that it does not require an external temperature sensor. All of the mechanisms contained inside the core are controlled by a state machine, so that they do not depend on the software in case the software fails. The state machine uses the temperature it reads from the SYSMONE4 primitive to decide the correct PWM duty-cycle. The temperature thresholds and hysteresis are defined in the hardware and cannot be modified by the software.

Running independently

The hardware can operate with minimal input from the software. Because by default the IP core starts IN-RESET, the software must write 0x1 to the REG_RSTN register to bring up the hardware. In order to activate the interrupts the software must also write to the IRQ_MASK register. At this point the hardware starts operating and a minimal feedback is provided.

There are 9 temperature intervals defined in the hardware as below:

Five of these intervals have only one possible duty-cycle and four of them can have either of the neighbouring values. After reset the PWM duty-cycle will start as 100%. The state-machine will begin reading the temperature from the SYSMONE4 primitive and will decide on the PWM duty cycle depending on which interval the value matches. The PWM duty-cycle will only change when the temperature enters one of the five intervals with a single PWM duty-cycle, in the other four the previous duty-cycle will be maintained. In these intervals its value will depend on whether the temperature is rising or falling. The temperature thresholds can be redefined using the parameters.

The temperature is obtained from the PL SYSMONE4 primitive and consists of a 16 bit raw value. This value can also be accessed by the software using the TEMPERATURE register however the reading is done periodically and overwrites the register so only the most value will be available. In order to keep the IP as light as possible, the value obtained from the SYSMONE4 primitive is used as raw, it is not converted to Celsius. In order to convert to Celsius the following formula needs to be used:

Temperature [C] = (ADC × 501.3743 / 2^bits) – 273.6777 ug580

There are five configurations described in the hardware, each with a corresponding tacho period +/- 25% tolerance.

*The tacho parameters are for a SUNON PF92251B1-000U-S99 fan

PWM duty-cycle Nominal tacho period Tacho tolerance 25%
0% N/A N/A
25% 32 ms 8ms
50% 12.8 ms 3.2 ms
75% 7.2 ms 1.8 ms
100% 6.4 ms 1.6 ms

The hardware will evaluate the tacho signal based on the current PWM duty-cycle by comparing the measured value with the interval's thresholds. i.e. at 50% duty-cycle the tacho period must stay within 9.6 ms and 16 ms.

A time-out is also used to check if there is any tacho signal at all.

Software control and customization

The software can request a different PWM duty-cycle by using the provided registers. All of the values inside the PWM/TACHO registers are in clock-cycle periods. It can also provide different tacho parameters if it wants to continue to evaluate the tacho signal. The PWM period can be read from the PWM_PERIOD register and is by default 20000.

i.e. 5KHz → 20000 * 10 ns = 200 us

The software may request a different PWM duty-cycle if needed by writing to the PWM_WIDTH register. The new value must be greater or equal to the value selected by the hardware and less or equal to the PWM period. The software can use the PWM_WIDTH and PWM_PERIOD registers in order to make sure the new value is valid.

After requesting a new duty-cycle there is a 5 second delay during which the hardware waits for the fan rotaion speed to stabilize. The software will then have to provide parameters for the tacho signal in order for the hardware to be able to evaluate it. To do this the software will have to write the TACHO_PERIOD and TACHO_TOLERANCE registers in that order. The software can read the TACHO_MEASUREMENT register to obtain the new tacho period and derive the tolerance value from it.

A mearsurement is performed by averaging 128 consecutive tacho perdiod measurements. The time needed to finish a measurement depends on the frequency of the signal.

The software can now use this register to read the new tacho pediod and then write it to the TACHO_PERIOD register. Then it can write a tolerance value to the TACHO_TOLERANCE register. The hardware will only start to monitor the tacho signal when the tolerance is provided.

Interrupts

The fan controller supports interrupts to both inform the software of any possible errors and also to facilitate the control of the core. There are four interrupt sources:

  • The PWM_CHANGED interrupt is generated at the end of the 5 second delay after a PWM duty-cycle change request. The request can come either from the software or from the hardware
  • The TEMP_INCREASE occurs when the hardware requests a higher PWM width than the curret one, indicating a rise in temperature.
  • NEW_TACHO_MEASUREMENT is asserted when a tacho measurement cycle is completed and the value is written to the TACHO_MEASUREMENT register. The software can use this interrupt in the process where it requests a new PWM width in order to obtain tacho information.
  • The TACHO_ERR interrupt is generated when the tacho signal either fails to stay within its designated frequency interval or does not toggle at all for 5 seconds.
resources/fpga/docs/axi_fan_control.1553679549.txt.gz · Last modified: 27 Mar 2019 10:39 by sarpadi