This version (04 Mar 2020 15:00) was approved by sarpadi.The Previously approved version (19 Apr 2019 14:40) is available.Diff

Fan Control IP Core

The axi_fan_control IP core is a software programmable fan controller.

Block Diagram


The purpose of this IP core is to control the fan used for the cooling of a Xilinx Zynq Ultrascale+ MPSoC without the need of any external temperature sensors. To achieve this, the IP core uses the PL SYSMONE4 primitive to obtain the PL temperature via the DRP interface. Based on the temperature readings it then outputs a PWM signal to control the fan rotation accordingly. The tacho signal coming from the fan is also measured and evaluated to ensure that the RPM is correct and the fan is working properly.

Configuration Parameter

Name Description Default Value
PWM_FREQUENCY_HZ Frequency of the PWM signal 5000 [Hz]
ID ID of the core instance 0
INTERNAL_SYSMONE Determines the source of the temperature information. 0 Means temperature is read from 'temp_in' port 0
AVG_POW Specifies the number of tacho measurements (2^AVP_POW) before averaging them. 7 is the highest value possible 7
TACHO_TOL_PERCENT Tolerance of tacho thresholds when evaluating measurements 25 [%]
TACHO_T25 Nominal tacho period at 25% PWM 1470000
TACHO_T50 Nominal tacho period at 50% PWM 820000
TACHO_T75 Nominal tacho period at 75% PWM 480000
TACHO_T100 Nominal tacho period at 100% PWM 340000
TEMP_00_H Temperature threshold below which PWM should be 0% 5 [°C]
TEMP_25_L Temperature threshold above which PWM should be 25% 20 [°C]
TEMP_25_H Temperature threshold below which PWM should be 25% 40 [°C]
TEMP_50_L Temperature threshold above which PWM should be 50% 60 [°C]
TEMP_50_H Temperature threshold below which PWM should be 50% 70 [°C]
TEMP_75_L Temperature threshold above which PWM should be 75% 80 [°C]
TEMP_75_H Temperature threshold below which PWM should be 75% 90 [°C]
TEMP_00_L Temperature threshold above which PWM should be 100% 95 [°C]

Signal and Interface Pins

Interface Pin Type Description
tacho input Tacho generator input
pwm output PWM control signal
irq output Interrupt signal, level high
temp_in Input bus for use with System Management Wizzard IP
s_axi AXI Slave Memory Map interface
s_axi_aclk input AXI clock
s_axi_aresetn input AXI reset

Register Map

Fan Controller (axi_fan_control)

Click to expand regmap


The IP core runs on the AXI clock and requires a frequency of 100MHz.

Theory of Operation

The main features of this IP core are its independent operation and the fact that it does not require an external temperature sensor. All of the mechanisms contained inside the core are controlled by a state machine, so that they do not depend on the software in case the software fails. The state machine uses the temperature it reads from the SYSMONE4 primitive or via the “temp_in” bus to decide the correct PWM duty-cycle. The temperature thresholds and hysteresis have defaults set in hardware and can be modified by the software. The INTERNAL_SYSMONE paramater is used to set the temperature values source, 0 when reading from temp_in and 1 when instantiating the internal SYSMONE primitive.

Running independently

The hardware can operate with no input from the software; the IP core starts working after the bitstream is loaded, without the need to be brought out of reset. In order to activate the interrupts the software must write to the IRQ_MASK register. At this point the hardware starts operating and a minimal feedback is provided.

There are 9 temperature intervals defined in the hardware as below:

Five of these intervals have only one possible duty-cycle and four of them can have either of the neighbouring values. After reset the PWM duty-cycle will start as 100%. The state-machine will begin reading the temperature and will decide on the PWM duty cycle depending on which interval the value matches. The PWM duty-cycle will only change when the temperature enters one of the five intervals with a single PWM duty-cycle, in the other four the previous duty-cycle will be maintained. In these intervals its value will depend on whether the temperature is rising or falling. The temperature can be reconfigured by the software.

The temperature is obtained from the PL SYSMONE4 primitive as a 16 bit raw value or from the temp_in bus as 10 bit. This value can also be accessed by the software using the TEMPERATURE register however the reading is done periodically and overwrites the register so only the most value will be available. In order to keep the IP as light as possible, the temperateure values obtained are used as raw, it is not converted to Celsius. In order to convert to Celsius the following formula needs to be used:

Internal SYSMONE4 primitive: Temperature [C] = (ADC × 501.3743 / 2^bits) – 273.6777 ug580

Reading from temp_in: Temperature [C] = (ADC *20 - 11195) / 41

There are five configurations described in the hardware, each with a corresponding tacho period +/- 25% tolerance.

*The tacho parameters are for a SUNON PF92251B1-000U-S99 fan

PWM duty-cycle Nominal tacho period Tacho tolerance 25%
0% N/A N/A
25% 32 ms 8ms
50% 12.8 ms 3.2 ms
75% 7.2 ms 1.8 ms
100% 6.4 ms 1.6 ms

The hardware will evaluate the tacho signal based on the current PWM duty-cycle by comparing the measured value with the interval's thresholds. i.e. at 50% duty-cycle the tacho period must stay within 9.6 ms and 16 ms.

A time-out is also used to check if there is any tacho signal at all.

Software control and customization

The software can overwrite the temperature thresholds and the tacho values if needed. The TEMP_00_H → TEMP_100_L registers can redefine the temperature intervals and the TACHO_25 → TACHO_100 registers can also be used to redefine tacho values if a different fan is installed. In this case the TACHO_*_TOL registers must also be written in orded to provide tolerances. They must be calculated by the software as % of the nominal value (i.e. 20% of 10000 = 2000).

The software can also set a custom PWM duty-cycle by using the provided registers. All the values inside the PWM/TACHO registers are in clock-cycle periods. The software can provide custom tacho parameters for that desired PWM if it wants to continue to evaluate the tacho signal. The PWM period can be read from the PWM_PERIOD register and is by default 20000.

i.e. 5KHz → 20000 * 10 ns = 200 us

The new PWM value must be greater or equal to the value selected by the hardware and less or equal to the PWM period. The software can use the PWM_WIDTH and PWM_PERIOD registers in order to make sure the new value is valid.

After requesting a new duty-cycle there is a 5 second delay during which the hardware waits for the fan rotaion speed to stabilize. The software will then have to provide parameters for the tacho signal in order for the hardware to be able to evaluate it. To do this the software will have to write the TACHO_PERIOD and TACHO_TOLERANCE registers in that order. The software can read the TACHO_MEASUREMENT register to obtain the new tacho period and derive the tolerance value from it.

A mearsurement is performed by averaging 2^AVP_POW consecutive tacho perdiod measurements. The time needed to finish a measurement depends on the frequency of the signal.

The software can now use this register to read the new tacho pediod and then write it to the TACHO_PERIOD register. Then it can write a tolerance value to the TACHO_TOLERANCE register. The hardware will only start to monitor the tacho signal when the tolerance is provided.


The fan controller supports interrupts to both inform the software of any possible errors and also to facilitate the control of the core. There are four interrupt sources:

  • The PWM_CHANGED interrupt is generated at the end of the 5 second delay after a PWM duty-cycle change request. The request can come either from the software or from the hardware
  • The TEMP_INCREASE occurs when the hardware requests a higher PWM width than the curret one, indicating a rise in temperature.
  • NEW_TACHO_MEASUREMENT is asserted when a tacho measurement cycle is completed and the value is written to the TACHO_MEASUREMENT register. The software can use this interrupt in the process where it requests a new PWM width in order to obtain tacho information.
  • The TACHO_ERR interrupt is generated when the tacho signal either fails to stay within its designated frequency interval or does not toggle at all for 5 seconds.
resources/fpga/docs/axi_fan_control.txt · Last modified: 05 Feb 2020 15:02 by sarpadi