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resources:fpga:docs:arch:intel_platforms [03 Nov 2021 11:28] – Fix A10SOC & GX Iulia Moldovanresources:fpga:docs:arch:intel_platforms [03 Nov 2021 11:28] (current) – created Iulia Moldovan
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 +====== Board capabilities - Intel ======
  
 +^ Board name                                                                                                                                         ^ FMC connector 1                       ^ FMC connector 2              ^
 +| [[https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-a10-gx-fpga.html|A10GX]]                                                     | LPC ()                 | HPC (8 x 17.4 Gbps)               |
 +| [[https://www.altera.com/products/boards_and_kits/dev-kits/altera/arria-10-soc-development-kit.html|A10SOC]]                                       | HPC (8)                      | LPC (8)             |
 +| [[https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/stratix-10-soc-development-kit.html|Stratix10SoC]] | FMC+ (24 @ 28.3 Gbps)                 | FMC+ (24 @ 28.3 Gbps)        |
 +
 +
 +==== VADJ values ====
 +^ Board name                                                                                                                                         ^ FMC 1                                 ^ FMC 2                          ^
 +| [[https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-a10-gx-fpga.html|A10GX]]                                                     | ***1.8V**/1.5V/1.35V/1.2V        | ***1.8V**/1.5V/1.35V/1.2V  |
 +| [[https://www.altera.com/products/boards_and_kits/dev-kits/altera/arria-10-soc-development-kit.html|A10SOC]]                                       | ***1.8V**/1.5V/1.35V/1.25V/1.2V/1.1V  | ***1.8V**/1.5V/1.35V/1.2V/1.1V |
 +| [[https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/stratix-10-soc-development-kit.html|Stratix10SoC]] | ***3.3V**/1.8V/1.2V                   | ***3.3V**/1.8V/1.2V            |
 +
 +(* bold) = default VADJ \\
 +FMC1 & FMC2 columns -> depending on the power supply of the device connected to the FMC, the custom VADJ will have the value supported by both the carrier and the device(s)
resources/fpga/docs/arch/intel_platforms.txt · Last modified: 03 Nov 2021 11:28 by Iulia Moldovan

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