FPGA Design

The lab is delivered together with a set of design files that are used to evaluate the ADI part. The FPGA image that must be loaded into the BeMicroSDK FPGA is included in the design files. This section presents the components included in the FPGA image and also the procedure to load the image into the FPGA.

FPGA Components

The following components are implemented in the FPGA design:

Name	Address	IRQ
CPU	800	-
Main PLL	80	-
JTAG UART	90	0
uC-Probe UART	A0	1
EPCS FLASH CONTROLLER	1800	2
OnChip RAM	10000	-
LED GPIO	100	-
SPI_0_P0	2000	4
SPI_1_P0	2040	6
GPIO	2080	-
CTRL GPIO	20A0	-
SPI_0_P1	0	5
SPI_1_P1	20	7
SYS ID	40	-
TIMER	60	3
I2C_0	C0	8
I2C_1	E0	9

Load the FPGA Image

To load the FPGA image the following steps must be performed:

Plug in the BeMicroSDK Stick into a USB port
Start Altera Quartus Web edition and start the programmer by selecting the menu option Tools→Programmer
Select Add File and select the file ADIEvalBoardLab/FPGA/SDP1_bemicro2.jic
Check the Program/Configure box and press Start

After finishing, the image is permanently loaded to the configuration Flash and the system will start with a blinking LED after reset or power up.

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Analog Devices Wiki

Table of Contents

FPGA Design

FPGA Components

Load the FPGA Image

Analog Devices Wiki

Table of Contents

FPGA Design

FPGA Components

Load the FPGA Image

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