This version is outdated by a newer approved version.
This version (27 Jan 2012 16:26) was approved by Robin Getz.The Previously approved version (27 Jan 2012 16:26) is available.
This version (27 Jan 2012 16:26) was approved by Robin Getz.The Previously approved version (27 Jan 2012 16:26) is available.This is an old revision of the document!
The next sections of this lab present all the steps needed to create a fully functional project that can be used for evaluating the operation of the ADI platform. It is possible to skip these steps and load into the FPGA an image that contains a fully functional system that can be used together with the uC-Probe interface for the ADI platform evalution. The first step of the quick evaluation process is to program the FPGA with the image provided in the lab files. Before the image can be loaded the Quartus II Web Edition tool or the Quartus II Programmer must be installed on your computer. To load the FPGA image run the program_fpga.bat batch file located in the ADIEvalBoardLab/FPGA folder. After the image was loaded the system must be reset. Now the FPGA contains a fully functional system and it is possible to skip directly to the uC-Probe Interface section of this lab.
resources/fpga/altera/bemicro/common_quick_eval.1327677989.txt.gz · Last modified: 27 Jan 2012 16:26 by Robin Getz