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resources:fpga:altera:bemicro:cn0178 [26 Oct 2011 15:42] – [CN0178: Software-Calibrated, 50 MHz to 9 GHz, RF Power Measurement System] Andrei Cozmaresources:fpga:altera:bemicro:cn0178 [26 Jan 2021 01:22] (current) – update arrow links after their web site update Robin Getz
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 ====== BeMicro FPGA Project for CN0178 with Nios driver ====== ====== BeMicro FPGA Project for CN0178 with Nios driver ======
  
 +===== Supported Devices =====
 +
 +  * [[adi>ADL5902]]
 +  * [[adi>AD7466]]
 +
 +===== Reference Circuits =====
 +
 +  * [[adi>CN0178]]
 ====== Overview ====== ====== Overview ======
  
-This lab presents the steps to setup an environment for using the **[[adi>EVAL-CN0178-SDPZ]]** evaluation board together with the **[[http://www.arrownac.com/solutions/bemicro-sdk/|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/page/products/tools/probe|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-CN0178-SDPZ Evaluation Board with the BeMicro SDK Platform.+This lab presents the steps to setup an environment for using the **[[adi>EVAL-CN0178-SDPZ]]** evaluation board together with the **[[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/tools/ucprobe/overview/|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-CN0178-SDPZ Evaluation Board with the BeMicro SDK Platform.
  
 {{ :resources:fpga:altera:bemicro:cn0178_bemicro.png?400 }} {{ :resources:fpga:altera:bemicro:cn0178_bemicro.png?400 }}
  
-For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: +{{page>common_sdp}}
-  * a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** +
-  * an compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] +
-  * corresponding PC software +
-The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software.  Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.+
  
 Below is presented a picture of **SDP-B** Controller Board with the **EVAL-CN0178-SDPZ** Evaluation Board. Below is presented a picture of **SDP-B** Controller Board with the **EVAL-CN0178-SDPZ** Evaluation Board.
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 The [[adi>AD7466]] is 12-bit, high speed, low power, successive approximation analog-to-digital converter (ADC). The part operates from a single 1.6 V to 3.6 V power supply and feature throughput rates up to 200 kSPS with low power dissipation. The part contains a low noise, wide bandwidth track-and-hold amplifier, which can handle input frequencies in excess of 3 MHz. The [[adi>AD7466]] is 12-bit, high speed, low power, successive approximation analog-to-digital converter (ADC). The part operates from a single 1.6 V to 3.6 V power supply and feature throughput rates up to 200 kSPS with low power dissipation. The part contains a low noise, wide bandwidth track-and-hold amplifier, which can handle input frequencies in excess of 3 MHz.
  
-The **EVAL-CN0178C-SDP** board contains the circuit to be evaluated, as described in this note. To power the EVAL-CN0178C-SDP evaluation board supply +6V between the +6 V and GND inputs. +The **EVAL-CN0178-SDP** board contains the circuit to be evaluated, as described in this note. To power the EVAL-CN0178C-SDP evaluation board supply +6V between the +6 V and GND inputs. 
  
 ===== More information ===== ===== More information =====
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   * [[adi>ADL5902|ADL5902 Product Info]] - pricing, samples, datasheet   * [[adi>ADL5902|ADL5902 Product Info]] - pricing, samples, datasheet
   * [[adi>AD7466|AD7466 Product Info]] - pricing, samples, datasheet   * [[adi>AD7466|AD7466 Product Info]] - pricing, samples, datasheet
-  * [[adi>/static/imported-files/circuit_notes/CN0178.pdf|EVAL-CN0178C-SDP evaluation board user guide]] +  * [[adi>CN0178|EVAL-CN0178-SDP evaluation board user guide]] 
-  * [[http://www.arrownac.com/solutions/bemicro-sdk|BeMicro SDK]]+  * [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]
   * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]]   * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]]+  * [[http://micrium.com/tools/ucprobe/overview/|Micrium uC-Probe]]
  
 ====== Getting Started ====== ====== Getting Started ======
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 Below is presented the list of required hardware items: Below is presented the list of required hardware items:
-  * Arrow Electronics [[http://www.arrow.com/bemicrosdk/|BeMicro SDK]] FPGA-based MCU Evaluation Board +  * Arrow Electronics [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] FPGA-based MCU Evaluation Board 
-  * [[http://www.arrownac.com/solutions/adi_interposer/|BeMicro SDK/SDP Interposer]] adapter board+  * [[adi>sdp-bemicro|BeMicro SDK/SDP Interposer]] adapter board
   * **EVAL-CN0178-SDPZ** evaluation board   * **EVAL-CN0178-SDPZ** evaluation board
   * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory   * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory
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   * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0   * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0
   * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0   * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool +  * [[http://micrium.com/tools/ucprobe/trial/|uC-Probe]] run-time monitoring tool, version 2.5
-  * {{:resources:fpga:altera:bemicro:cn0178_evalboardlab.zip|Lab Design Files}}+
  
 The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web.  The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. 
  
-The **Micrium uC/Probe Trial** version is available via download from the web at [[http://micrium.com/download/Micrium-uC-Probe-Setup-Trial.exe]].  After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list. +The **Micrium uC/Probe Trial** version 2.5 is available via download from the web at [[http://micrium.com/tools/ucprobe/trial/]].  After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list.
  
 +===== Downloads =====
 +  * {{:resources:fpga:altera:bemicro:cn0178_evalboardlab.zip|Lab Design Files}}
 ===== Extract the Lab Files ===== ===== Extract the Lab Files =====
  
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 {{page>common_usb}} {{page>common_usb}}
  
 +====== Quick Evaluation ======
 {{page>common_quick_eval}} {{page>common_quick_eval}}
  
 +====== FPGA Design ======
 {{page>common_spi_i2c}} {{page>common_spi_i2c}}
  
 +====== NIOS II Software Design ======
 {{page>common}} {{page>common}}
  
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 **Section C** is used to store the calibration data and to display the calculated information. The calibration is performed by applying four known signal levels to the ADL5902 and measuring the corresponding output codes from the ADC. The calibration points chosen should be within the linear operating range of the device. In this example, calibration points at 10 dBm, 0 dBm, −10 dBm, and −20 dBm were used. **Section C** is used to store the calibration data and to display the calculated information. The calibration is performed by applying four known signal levels to the ADL5902 and measuring the corresponding output codes from the ADC. The calibration points chosen should be within the linear operating range of the device. In this example, calibration points at 10 dBm, 0 dBm, −10 dBm, and −20 dBm were used.
  
-<note>+<WRAP round help>
 User has to add manually ADC Code and Input Power for each signal, in the Calibration Data section. Frequency and temperature are optional. Slope and Intercept are calculated by the interface. User has to add manually ADC Code and Input Power for each signal, in the Calibration Data section. Frequency and temperature are optional. Slope and Intercept are calculated by the interface.
-</note>+</WRAP>
  
 The SLOPE and INTERCEPT calibration coefficients are calculated using the equations: The SLOPE and INTERCEPT calibration coefficients are calculated using the equations:
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 In order to retrieve the appropriate SLOPE and INTERCEPT calibration coefficients during circuit operation, the observed CODE from the ADC must be compared to CODE_1, CODE_2, CODE_3, and CODE_4. For example if the CODE from the ADC is between CODE_1 and CODE_2, then the SLOPE1 and INTERCEPT1 should be used. In order to retrieve the appropriate SLOPE and INTERCEPT calibration coefficients during circuit operation, the observed CODE from the ADC must be compared to CODE_1, CODE_2, CODE_3, and CODE_4. For example if the CODE from the ADC is between CODE_1 and CODE_2, then the SLOPE1 and INTERCEPT1 should be used.
  
-<note>+<WRAP round help>
 The interface chooses the slope and intercept for each ADC code and calculates the Power. For the error to be calculated, it is necessary to add manually the Input Power. Frequency and temperature are optional. The interface chooses the slope and intercept for each ADC code and calculates the Power. For the error to be calculated, it is necessary to add manually the Input Power. Frequency and temperature are optional.
-</note>+</WRAP>
  
  
 {{page>troubleshooting}} {{page>troubleshooting}}
- 
resources/fpga/altera/bemicro/cn0178.1319636552.txt.gz · Last modified: 26 Oct 2011 15:42 by Andrei Cozma

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