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This version is outdated by a newer approved version.DiffThis version (03 May 2021 18:52) was approved by Weston Sapia.The Previously approved version (17 Mar 2021 16:59) is available.Diff

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Table of Contents

EVALUATING THE ADAR1000-EVAL1Z (STINGRAY) ANALOG BEAMFORMING FRONT-END

(UNDER CONSTRUCTION)

GENERAL DESCRIPTION

The ADAR1000-EVAL1Z evaluation board is an analog beamforming front-end designed for testing the performance of the ADAR1000 and ADTR1107. The ADAR1000 is an 8 GHz to 16 GHz, 4-Channel, X Band and Ku Band Beamformer IC. The ADTR1107 is a 6 GHz to 18 GHz, Front-End Transmit/Receive module.

The ADAR1000-EVAL1Z board consists of 8 RF cells. Each cell contains a core ADAR1000 surrounded by four ADTR1107s. All RF input/outputs on the evaluation board are brought out to SMPM coaxial connectors. There is a 12V power input and all required voltage rails for the board are generated on-board. Digital control of the board as well as the beamformers is enabled using either an System Demonstration Platform (SDP-S) connector or a dual PMOD interface. Control signals for the board are expected to be 3.3V logic with on-board level translators converting this to the on-chip logic level of 1.8V.

ADAR1000-EVAL1Z Board

Figure 1: ADAR1000-EVAL1Z Board

Main RFICs

ADAR1000: 8 GHz to 16 GHz, 4-Channel, X Band and Ku Band Beamformer

ADTR1107: 6 GHz to 18 GHz, Front-End Transmit/Receive Module

Peripheral ICs

RF Detector Block

Power Generation

Control & Monitoring

REQUIREMENTS

Documents

Hardware

  • ADAR1000-EVAL1Z Evaluation Board Kit
  • Snap-on Antenna Board (available upon request)
  • Digital controller and associated hardware (SDP-S or PMOD)
  • SMPM-SMA cabling to interface with the RF ports

Suggested Test Equipment

  • 20GHz RF Signal Generator
  • 20GHz Spectrum Analyzer
  • 20GHz Vector Network Analyzer
  • Thermal Camera (optional)
  • Oscilloscope (optional)
  • RF Power Meter (optional)

Software/Digital Control

SDP Control

PMOD Control

BOARD DESIGN

The ADAR1000-EVAL1Z evaluation board has 8 SMPM RFIO connectors for the 8 cells on the component side of the board. There are 33 SMPM connectors on the opposite side of the board. 32 of these correspond to the 32 RF channels while the last connector goes to the RF detector and ADC combo on the bottom of the board which is intended to be used for calibration.

Two 6-pin Molex “Mini-Fit Jr.” connectors are provided to apply the required 12V power supply. One is for the power supply input, and the other can be used to daisy-chain a second board to power both boards using one power supply. Note that the included power supply can only support two ADAR1000-EVAL1Z boards.

Power Supply

The ADAR1000-EVAL1Z board must be powered from the included power supply with a voltage level of 12V. There is an on-board power management tree which generates the required voltage rails for all of the associated parts.

RF Input and Output Signals

The ADAR1000-EVAL1Z board has 41 surface-mounted SMPM connectors which are described in Table 1.

Table 1: RF Connectors

Connector(s) Name(s) Description
J1 - J8 RFIOx ADAR1000 RFIO Connectors
J1_1 - J1_8, J2_1 - J2_8, J3_1 - J3_8, J4_1 - J4_8 ANT1_1 - ANT1_8, ANT2_1 - ANT2_8, ANT3_1 - ANT3_8, ANT4_1 - ANT4_8 Antenna Connectors
J9 N/A RF Detector Input Connector

ADAR1000-EVAL1Z Component Side Overview

Figure 2: ADAR1000-EVAL1Z Component Side Overview

ADAR1000-EVAL1Z Antenna Side Overview

Figure 3: ADAR1000-EVAL1Z Antenna Side Overview

Digital Signals

The digital input signals are intended to be 3.3V logic while the ADAR1000 requires logic levels of 1.8V. To protect the ADAR1000, level translators have been included between the digital connectors and the ADAR1000s. There are test points on the 1.8V side of the level translators, but these are not meant to be used to inject signals, only to view the signals reaching the ADAR1000s.

PMOD Pinout

PMOD Pinout

Figure 4: ADAR1000-EVAL1Z PMOD Pinout

SPI Control

The ADAR1000-EVAL1Z has five chip-select lines available for use. Four of these lines (CSB1, CSB2, CSB3, CSB4) are intended to be used for the ADAR1000s while the last line (CSB5) is dedicated for the RF detector/ADC combo on the antenna side of the board.

Each ADAR1000 has two ADDRx pins which can be used to control 4 separate ADAR1000s using only one CSB line. See the ADAR1000 Datasheet for details on this. As the ADAR1000-EVAL1Z has eight ADAR1000s, a minimum of two CSB lines are needed to have control over all the individual ICs. There are two CSB selector switches (S1, S2) which select the CSB line for the associated side of the board. Looking at the component side of the board, the left four ADAR1000s use the CSB line selected by S1 while the right four ADAR1000s use the CSB line selected by S2.

CSB Selector Switches

Figure 5: CSB Selector Switches

The ADAR1000-EVAL1Z alone demonstrates a small beamformer array, but multiple boards can also be stacked and combined to create larger arrays. In order to simplify the digital interface, two boards can be controlled using one digital controller if the two boards use all four of the available CSB lines without worrying about talking to the wrong IC.

EVALUATION

Hardware Setup

Mechanical Parts

  • 1x ADAR1000-EVAL1Z board with heatsink already attached
  • 2x Uprights with 16 screws attached (6 per leg for the ADAR1000-EVAL1Z board, 1 per leg for the feet)
  • 2x Feet with angles installed

Mechanical Assembly

  1. Using a 3/32 inch allen key, connect the feet to the uprights using the 2 silver screws already installed at the bottom of the upright. The screws should be snug, but don't need to be cranked down.
  2. Using a 5/64 inch allen key, connect the ADAR1000-EVAL1Z board to the uprights, one at a time using the 12 black screws already installed in the uprights. The uprights are attached via the front (component side) of the ADAR1000-EVAL1Z board. The screws should be snug, but don't need to be cranked down.
  3. The platform should now be fully assembled. Compare the result to the assembly drawing to ensure proper assembly.

Test Setup Assembly

  1. Follow the Mechanical Assembly instructions.
  2. Plug the included power supply into an outlet before connecting the power supply to P1 in the lower left-hand side of the board. Once finished, a red LED (D3) should be lit in the bottom-left corner of the board.
  3. Connect your digital controller of choice to the appropriate connector (P3/P4 for PMOD control, P5 for SDP-S control).
  4. Disable any test equipment of interest, and connect it to the ADAR1000-EVAL1Z board.

Board Power Control

The ADAR1000-EVAL1Z board's power tree is controlled using two signals, PWR_UP_DOWN and +5V_CTRL. Due to the default settings of the ADAR1000 on powerup, the ADTR1107 PAs need to be protected so as not to be destroyed when power is applied. The easiest way to control this is to power everything on the board except for the ADTR1107s' +5V rail, initialize the ADAR1000s to put the ADTR1107 PAs into a safe state, and then power up the +5V rail.

Both PWR_UP_DOWN and +5V_CTRL are controlled with pulses, not logic levels, as they are inputs to flip-flops rather than enable signals directly.

Powerup Procedure

1. Apply +12V to either P1 or P2. Note the red LED (D3) on the bottom of the board. When lit, 12V is applied and the hot swap circuit is active. At this point, no RF rails are powered, but some miscellaneous rails are up:

2. Configure the LTC2992 by following the CONFIGURING THE LTC2992 section below.

3. Pulse the PWR_UP_DOWN signal to sequence the first RF power rails. Once the power sequencer is finished, the ADAR1000s are fully powered up and the ADTR1107s are partially powered. This is indicated with an orange LED (D6).

The ADM1186 power sequencer's enable and power_good signals can be read using the on-board LTC2992. The enable signal is connected to GPIO1 and the power_good signal is connected to GPIO3.
BE SURE TO CONFIGURE THE LTC2992 SUCH THAT ALL
GPIO PINS ARE HI-Z! SEE CONFIGURING THE LTC2992

4. Initialize the ADAR1000s to put the ADAR1000-EVAL1Z into a known safe state with the ADTR1107 PAs pinched off. See the Recommended ADAR1000 Initialization Sequence section for a recommended set of SPI writes.

5. Now that the ADTR1107 PAs are pinched off, +5V can safely be applied. This is accomplished by pulsing the +5V_CTRL signal. Once the +5V rail is up, a green LED (D4) is lit showing that the board is fully powered up.

The internal +5V_CTRL (after U3) and the LT8652's power_good signals can be read using the on-board LTC2992. The +5V_CTRL signal is connected to GPIO2 and the power_good signal is connected to GPIO4.


BE SURE TO CONFIGURE THE LTC2992 SUCH THAT ALL
GPIO PINS ARE HI-Z! SEE CONFIGURING THE LTC2992

Powerdown Procedure

  1. Pulse the +5V_CTRL signal to bring down the +5V power supply rail. The green LED will turn off indicating that the rail is down.
  2. Pulse the PWR_UP_DOWN signal to tell the power sequencer to bring down the other RF rails in reverse order from powerup.
It is possible to only pulse PWR_UP_DOWN to turn off the board as disabling the power sequencer will also bring down the +5V rail. This is not recommended as it's safer to intentionally bring down +5V first, and will guarantee that any software controlling the board will not lose the current state.

Software Control

  • Follow the Powerup Procedure to safely turn the board on.
  • At this point, the board is fully enabled, but all amplifiers are powered down. In order to pass signals, the board needs to be put into either Rx or Tx mode and the ADTR1107 amplifiers properly biased up. See the ADAR1000 Datasheet for information on how to do this.

RF Detector and ADC Combination

There is an on-board RF detector/ADC combo which can be used to help calibrate the ADAR1000-EVAL1Z or measure test signals. The circuit is located on the antenna side of the board near the bottom.

The RF detector is the HMC948 which feeds an ADA4807-1 unity gain buffer. The ADA4807-1 output then goes to the LTC2314-14. See the LTC2314-14 Datasheet for information on retrieving data from the ADC.

The HMC948 has approximately 54dB of dynamic range at 10GHz centered at -24dBm.

Recommended ADAR1000 Initialization Sequences

The below sequences don't take into account the different hardware addresses of the various ADAR1000s. Consult the ADAR1000 Datasheet for more information on the hardware addressing.
The below sequences don't take into account the issues described in the ADAR1000 Silicon & Datasheet Errata. Consult these documents for more information about how to properly communicate with all parts on the board.
The below sequences don't account for the fact that the Stingray uses two CSB lines to address all of the ADAR1000s on the board. In order to configure all chips, the sequences must be run on each required CSB line individually.

Initial Powerup

adar1000_init.py
"""
This sequence is suggested to be run after powering the +3.3V, -3.3V, and -5.0V rails on the Stingray board, 
but before powering the +5.0V rail. This will help protect the ADTR1107 PAs. It will put the chips into a 
known safe state on powerup.
    Format: (Register, Data, Description)
"""
INIT_SEQUENCE = [
    # HOUSEKEEPING
    (0x000, 0x81, 'Reset'),
    (0x038, 0x60, 'Bypass the beam and bias RAM (enable SPI)'),
    (0x02E, 0x7F, 'Enable all Rx channels, LNA, VGA, Vector Mod'),
    (0x02F, 0x7F, 'Enable all Tx channels, PA, VGA, Vector Mod'),
    (0x034, 0x08, 'Set LNA preamplifier to nominal bias'),
    (0x035, 0x55, 'Set Rx VGA and Vector Mod to nominal bias'),
    (0x036, 0x2D, 'Set Tx VGA and Vector Mod to nominal bias'),
    (0x037, 0x06, 'Set Tx PA preamplifier to nominal bias'),
 
    # PA BIAS VALUES
    (0x029, 0x85, 'Set PA1_BIAS_ON value (≈ -2.5V)'),
    (0x02A, 0x85, 'Set PA2_BIAS_ON value (≈ -2.5V)'),
    (0x02B, 0x85, 'Set PA3_BIAS_ON value (≈ -2.5V)'),
    (0x02C, 0x85, 'Set PA4_BIAS_ON value (≈ -2.5V)'),
    (0x046, 0x85, 'Set PA1_BIAS_OFF value (≈ -2.5V)'),
    (0x047, 0x85, 'Set PA2_BIAS_OFF value (≈ -2.5V)'),
    (0x048, 0x85, 'Set PA3_BIAS_OFF value (≈ -2.5V)'),
    (0x049, 0x85, 'Set PA4_BIAS_OFF value (≈ -2.5V)'),
 
    # LNA BIAS VALUES
    (0x02D, 0x68, 'Set LNA_BIAS_ON value (≈ -2.0V)'),
    (0x04A, 0x68, 'Set LNA_BIAS_OFF value (≈ -2.0V)'),
 
    # TR CONTROL STATE
    (0x031, 0x90, 'Disable Tx/Rx using SPI TR control'),
 
    # Enable PA/LNA DACs
    (0x030, 0x50, 'Enable the PA and LNA output DACs'),
]

Max Gain & 0° Phase

adar1000_max_gain_0_phase.py
"""
Sequence to set all ADAR1000 channels to maximum gain and 0° phase.
    Format: (Register, Data, Description)
"""
CHANNEL_SETUP = [
    # Rx GAIN
    (0x010, 0xFF, 'Set channel 1 Rx to maximum gain'),
    (0x011, 0xFF, 'Set channel 2 Rx to maximum gain'),
    (0x012, 0xFF, 'Set channel 3 Rx to maximum gain'),
    (0x013, 0xFF, 'Set channel 4 Rx to maximum gain'),
 
    # Rx PHASE
    (0x014, 0x3F, 'Set channel 1 Rx I Vector Modulator to 0°'),
    (0x015, 0x20, 'Set channel 1 Rx Q Vector Modulator to 0°'),
    (0x016, 0x3F, 'Set channel 2 Rx I Vector Modulator to 0°'),
    (0x017, 0x20, 'Set channel 2 Rx Q Vector Modulator to 0°'),
    (0x018, 0x3F, 'Set channel 3 Rx I Vector Modulator to 0°'),
    (0x019, 0x20, 'Set channel 3 Rx Q Vector Modulator to 0°'),
    (0x01A, 0x3F, 'Set channel 4 Rx I Vector Modulator to 0°'),
    (0x01B, 0x20, 'Set channel 4 Rx Q Vector Modulator to 0°'),
 
    # Tx GAIN
    (0x01C, 0xFF, 'Set channel 1 Tx to maximum gain'),
    (0x01D, 0xFF, 'Set channel 2 Tx to maximum gain'),
    (0x01E, 0xFF, 'Set channel 3 Tx to maximum gain'),
    (0x01F, 0xFF, 'Set channel 4 Tx to maximum gain'),
 
    # Tx PHASE
    (0x020, 0x3F, 'Set channel 1 Tx I Vector Modulator to 0°'),
    (0x021, 0x20, 'Set channel 1 Tx Q Vector Modulator to 0°'),
    (0x022, 0x3F, 'Set channel 2 Tx I Vector Modulator to 0°'),
    (0x023, 0x20, 'Set channel 2 Tx Q Vector Modulator to 0°'),
    (0x024, 0x3F, 'Set channel 3 Tx I Vector Modulator to 0°'),
    (0x025, 0x20, 'Set channel 3 Tx Q Vector Modulator to 0°'),
    (0x026, 0x3F, 'Set channel 4 Tx I Vector Modulator to 0°'),
    (0x027, 0x20, 'Set channel 4 Tx Q Vector Modulator to 0°')
]

Disable

adar1000_disable.py
"""
This sequence will disable the ADAR1000 and put the chip into a low power state.
    Format: (Register, Data, Description)
"""
DISABLE = [
    (0x029, 0x85, 'Set CH1 PA_BIAS_ON to minimal power (≈ -2.5V)'),
    (0x02A, 0x85, 'Set CH2 PA_BIAS_ON to minimal power (≈ -2.5V)'),
    (0x02B, 0x85, 'Set CH3 PA_BIAS_ON to minimal power (≈ -2.5V)'),
    (0x02C, 0x85, 'Set CH4 PA_BIAS_ON to minimal power (≈ -2.5V)'),
    (0x02D, 0x68, 'Set LNA_BIAS_ON to minimal power (≈ -2.0V)'),
    (0x030, 0x50, 'Enable the LNA bias DAC output'),
    (0x031, 0x90, 'Put ADAR1000 into SPI-controlled TR state and disable TX_EN/RX_EN bits')
]

Rx Enable

adar1000_rx_enable.py
"""
This sequence will configure the ADAR1000 for Rx and set the LNAs to full power.
Be sure you know what you're doing!
    Format: (Register, Data, Description)
"""
RX_SETUP = [
    (0x030, 0x40, 'Disable the LNA bias DAC output to allow the ADTR1107 LNAs to self-bias'),
    (0x031, 0xB0, 'Put ADAR1000 into SPI-controlled Rx mode')
]

Tx Enable (Reduced Power)

adar1000_tx_enable_reduced.py
"""
This sequence will configure the ADAR1000 for Tx and set the PAs to a reduced power state.
Be sure you know what you're doing!
    Format: (Register, Data, Description)
"""
TX_SETUP_REDUCED_POWER = [
    (0x029, 0x42, 'Set CH1 PA_BIAS_ON to reduced power (≈ -1.25V)'),
    (0x02A, 0x42, 'Set CH2 PA_BIAS_ON to reduced power (≈ -1.25V)'),
    (0x02B, 0x42, 'Set CH3 PA_BIAS_ON to reduced power (≈ -1.25V)'),
    (0x02C, 0x42, 'Set CH4 PA_BIAS_ON to reduced power (≈ -1.25V)'),
    (0x031, 0xD2, 'Put ADAR1000 into SPI-controlled Tx mode')
]

Tx Enable

adar1000_tx_enable.py
"""
This sequence will configure the ADAR1000 for Tx and set the PAs to full power.
Be sure you know what you're doing!
    Format: (Register, Data, Description)
"""
TX_SETUP = [
    (0x029, 0x38, 'Set CH1 PA_BIAS_ON to full power (≈ -1.06V)'),
    (0x02A, 0x38, 'Set CH2 PA_BIAS_ON to full power (≈ -1.06V)'),
    (0x02B, 0x38, 'Set CH3 PA_BIAS_ON to full power (≈ -1.06V)'),
    (0x02C, 0x38, 'Set CH4 PA_BIAS_ON to full power (≈ -1.06V)'),
    (0x031, 0xD2, 'Put ADAR1000 into SPI-controlled Tx mode')
]

Configuring the LTC2992

On powerup, the LTC2992 is configured with GPIO3 held low. To properly power the Stingray board, this pin needs to be set to Hi-Z. Complete the below I2C writes to ensure that all GPIO pins are set to Hi-Z:

The LTC2992's I2C 7-bit address is 0x6A, its 8-bit address is 0xD4
The LTC2992 requires repeated START conditions for readback
ltc2992_configuration.py
"""
This sequence will set the LTC2992's GPIO pins to Hi-Z.
    Format: (Register, Data, Description)
"""
LTC2992_SETUP = [
    (0x96, 0x00, 'Set GPIO1-GPIO3 pins to Hi-Z'),
    (0x97, 0x00, 'Set GPIO4 pin to Hi-Z')
]
resources/eval/user-guides/stingray/userguide.1620060746.txt.gz · Last modified: 03 May 2021 18:52 by Weston Sapia

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