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This version (30 Mar 2019 00:29) was approved by travisfcollins.The Previously approved version (19 Jan 2018 10:22) is available.Diff

FMC Carrier

Hardware

Rev C FMC Carrier

 This is the Rev C schematic and layout files for the FMC carrier.

Trips and Tricks

External AD9361 reference clock via J1

An external Reference Clock can be supplied via J1. In order the switch the source the zynq-adrv9361-z7035.dtsi device tree needs to be modified.

	clocks {
		xo_40mhz_fixed_clk: clock@0 {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <40000000>;
			clock-output-names = "XO_40MHz";
		};

		ad9361_clkin: clock@1 {
			#clock-cells = <0>;
			compatible = "gpio-gate-clock";
			clocks = <&xo_40mhz_fixed_clk>;
			enable-gpios = <&gpio0 105 1>; /* Set to 1 for extern AD9361_CLK */
			clock-output-names = "ad9361_ext_refclk";
		};

Option:
    enable-gpios = <&gpio0 105 ACTIVE_LEVEL>;

    ACTIVE_LEVEL:
    0 (active high) use on-board XO
    1 (active low) use external clock via J1
  1. Update the clock-frequency property with the exact frequency of the external supplied clock.
  2. Set enable-gpios = <&gpio0 105 1>
  3. Rebuild and install your modified device tree on the target
resources/eval/user-guides/pzsdr/carriers/fmc.txt · Last modified: 30 Mar 2019 00:29 by travisfcollins