This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
resources:eval:user-guides:high-temp:ev-ht-200cdaq1:firmware [21 Feb 2018 01:46] – initial version Jeff Watson | resources:eval:user-guides:high-temp:ev-ht-200cdaq1:firmware [01 Mar 2018 03:41] (current) – edited figures Jeff Watson | ||
---|---|---|---|
Line 1: | Line 1: | ||
- | ====== EV-HT-200CDAQ1 Firmware | + | |
+ | ====== EV-HT-200CDAQ1 Firmware | ||
===== Purpose ===== | ===== Purpose ===== | ||
- | This document is intended to provide firmware developers an introduction into the code structure and specifics on some of the time critical functions. | + | This document is intended to provide firmware developers an introduction into the code structure and specifics on some of the time critical functions. |
| | ||
The project controls the activity of the EV-HT-200CDAQ1, | The project controls the activity of the EV-HT-200CDAQ1, | ||
- | ---- | + | ==== Source and Header File Organization ==== |
+ | The project is organized into .c and .h files. | ||
+ | |||
+ | {{: | ||
+ | |||
===== Firmware Function Overview ===== | ===== Firmware Function Overview ===== | ||
- | A simplified flow diagram is shown in below The ADC sampling engine is time critical and is explained in a later section. | + | A simplified flow diagram is shown in below. The ADC sampling engine is time critical and is explained in a later section. |
<WRAP center round box 100%> | <WRAP center round box 100%> | ||
- | {{: | + | {{: |
EV-HT-200CDAQ1 Firmware Flowchart | EV-HT-200CDAQ1 Firmware Flowchart | ||
</ | </ | ||
\\ | \\ | ||
<WRAP center round box 100%> | <WRAP center round box 100%> | ||
- | {{: | + | {{: |
Parser Routine Flow | Parser Routine Flow | ||
</ | </ | ||
- | ---- | ||
- | ==== Source and Header File Organization ==== | ||
- | The project is organized into .c and .h files. | ||
- | {{: | ||
==== Mode and Status Parameters ==== | ==== Mode and Status Parameters ==== | ||
+ | As commands are entered and data is collected, there are important state parameters used to coordinate the sampling engine and the UART output activity. The table below lists the most important enumerations for the project. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | ===== MCU Resource Use ===== | ||
+ | This section has tables showing the pins, peripherals and interrupts used in the project. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | ==== MCU Pin Use Table ==== | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ==== Peripheral and Timer Use Table==== | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ==== Interrupt Vector Use Table==== | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ===== UART input (" | ||
+ | |||
+ | A PC will be able to send information to the MCU via a USB to UART converter. | ||
+ | |||
+ | UART settings are: | ||
+ | * Baud rate = 2 Mbits/sec, 8-bits data, 0 parity, 1 stop (8N1) | ||
+ | * Hardware handshaking enabled. | ||
+ | * No CRC on frame | ||
+ | |||
+ | UART receive software is implemented in an ISR when the FIFO buffer has information available. | ||
+ | |||
+ | ===== Parsing (“parser.c”) ===== | ||
+ | |||
+ | As part of the main loop, the “ParseCommand” function is called. | ||
+ | |||
+ | Valid commands will prompt further actions. | ||
+ | |||
+ | ===== ADC sampling (“sampling_engine.c”) ===== | ||
+ | |||
+ | When prompted via a valid UART command, an ADC sampling sequence (“experiment”) is initiated. | ||
+ | |||
+ | * Iterative Burst mode (Iteration rate set by “$setexp” command) | ||
+ | * Single shot burst mode | ||
+ | * Continuous mode | ||
+ | * External trigger burst mode. | ||
+ | |||
+ | For iterative burst and single shot burst, the second (1/60 of a minute) counter ISR will check the status and mode information and commence the experiment. | ||
+ | |||
+ | The MCU will use the SPI interface to clock data out of the ADC. The conversion start signal is generated with a timer which allows precise sampling period control and a precise pulse width needed for the CNV input signal to the ADC. Before the next conversion starts, the data from the present conversion is clocked out completely. | ||
+ | |||
+ | The ADC Data Out signal will go to a high impedance state when a conversion is being made. To reduce current consumption and eliminate potential switching noise, the MCU’s internal pull-up resistor (~33kΩ) is enabled on all MISO pins. | ||
+ | |||
+ | The ADC servicing is done in the timer interrupt service routine. | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | Data collected from the ADC is stored in a dedicated 16kbyte (16,384) buffer that will later be sent out a UART port to a PC host. The buffer can be divided into segments for different ADC channels as set by the incoming command. | ||
+ | |||
+ | <note important> | ||
+ | </ | ||
+ | |||
+ | ==== SPI Setup ==== | ||
+ | |||
+ | The SPI clock is set to 25 MHz. This is half the MCU system clock and the fastest achievable SPI master clock from the VA10800. | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ==== Aligning CNV signals for ADC0 & ADC1 ==== | ||
+ | |||
+ | One of the sampling timing requirements is that the CNV signals for ADC0 and ADC1 being exactly aligned. | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ==== External Trigger Mode ==== | ||
+ | |||
+ | External trigger mode allows an external signal to dictate when a burst experiment commences. | ||
+ | |||
+ | ==== VCC and RTD Sampling with Burst ==== | ||
+ | |||
+ | The viewer program on the PC expects VCC and RTD information to go along with every burst sequence. | ||
+ | |||
+ | ===== UART output (“output.c” & “uart.c”) ===== | ||
+ | |||
+ | The UART is the primary communication channel from the MCU to a user. It is routed through a UART to USB converter to a PC’s USB port. A virtual serial communication port program such as PuTTY can be used to collect the data. (TeraTerm did not support 2Mbit/sec rates and could not be used) | ||
+ | |||
+ | UART settings are: | ||
+ | * Baud rate = 2 Mbits/sec, 8 bits data, 0 parity, 1 stop (8N1) | ||
+ | * Flow control signals must be used. Windows OS only services the COM ports periodically and if there are several programs running or the display is being refreshed, the PC cannot keep up with 2Mbit/sec data flow. It was required to implement CTS on the MCU to gate the transmission of data. | ||
+ | * No CRC on frame. | ||
+ | |||
+ | Data buffered from the ADC is stored in 16-bit integer format. | ||
+ | |||
+ | ===== Free RTOS Shell ===== | ||
+ | |||
+ | The code is written in a FreeRTOS shell. | ||
+ | |||
+ | <note important> | ||
+ | |||
+ | The below diagram shows the priority hierarchy. | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | Due to some inherent interrupt blocking of FreeRTOS during task changes, a conflict can arise when the ADCs are being converted very rapidly, under 4us. During an acquisition experiment with sampling rate under 4us, the RTOS is temporarily disabled. | ||
+ | |||
+ | ===== Housekeeping ===== | ||
+ | |||
+ | ==== Watchdog Timer ==== | ||
+ | One timer is used to create a watchdog timer. | ||
+ | |||
+ | ==== Unused Port Pins ==== | ||
+ | |||
+ | All unused port pins are terminated using an internal pull-down resistor. | ||
+ | |||
+ | ==== Temperature and Vcc Calculation ==== | ||
+ | |||
+ | The RTD data sheet contains a table with resistance values for every 1°C. Firmware has created a linear interpolation conversion program for 5 different regions in the -55°C to 200°C range. | ||
+ | |||
+ | Both the RTD and VCC calculations account for a voltage divider network. | ||
+ | <note important> | ||
+ | |||
+ | ===== Performance ===== | ||
+ | |||
+ | This section contains information on the MCU response time, maximum conversion rates and approximate code size for various tasks. | ||
+ | |||
+ | ==== ADC Sample Rate ==== | ||
+ | |||
+ | As shown in the below diagram, the fastest ADC sample rate using interrupt is 413 kHz which corresponds to 2.4ųs. | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ==== UART RX Performance ==== | ||
+ | |||
+ | The MCU must be able to receive a 64-character string from the host PC at a baud rate of 2Mbps. | ||
+ | |||
+ | ==== UART TX Performance ==== | ||
+ | |||
+ | Due to bandwidth limitations of a PC’s USB port, flow control (CTS signal enabled) must be implemented on the UART transmitter. | ||
+ | |||
+ | If transmission of sample data does not complete before the next sampling period, the next sampling period will be dropped entirely with no message. | ||
+ | |||
+ | ==== CPU Processing Margin and Memory Use ==== | ||
+ | |||
+ | The RTOS scheduler is allocating 50% of the CPU bandwidth for handling the acquisition task. Some activities are interrupt driven and the actual CPU cycles spent on these are dependent on sampling rate and amount of data being transmitted to a PC. The following table can be used to estimate the available CPU bandwidth. | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | ===== Compiler and IDE ===== | ||
+ | |||
+ | The initial firmware package was developed and tested using the Keil µvision IDE revision 5.23. The code size is below 32k and the free evaluation version can be used. | ||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||
+ | |||