| Both sides previous revisionPrevious revisionNext revision | Previous revision |
| resources:eval:user-guides:adum770x [29 Jan 2019 15:22] – Update the print screen Istvan Csomortani | resources:eval:user-guides:adum770x [20 Jan 2022 17:25] (current) – [Downloads] z zg |
|---|
| ====== ADuM7701/02 - No-OS Driver ====== | ====== ADuM7701 - Reference Design ====== |
| | |
| | ==== Supported Devices ==== |
| |
| ===== Supported Devices ===== | |
| * [[adi>ADuM7701]] | * [[adi>ADuM7701]] |
| * [[adi>ADuM7702]] | |
| * [[adi>AD7405]] | * [[adi>AD7405]] |
| * [[adi>AD7403]] | * [[adi>AD7403]] |
| | |
| | ==== Supported Carrier Board ==== |
| | |
| | * [[http://zedboard.org/product/zedboard|Zedboard]] |
| |
| ===== Overview ===== | ===== Overview ===== |
| |
| The [[adi>ADuM7701]]/[[adi>ADuM7702]] are are high performance, second-order, Σ-Δ modulators that convert an analog input signal into a high speed, single-bit data stream, with on-chip digital isolation based on Analog Devices, Inc., iCoupler® technology. The devices operate from a 5 V (VDD1) power supply and accept a pseudo-differential input signal of ±250 mV [[adi>ADuM7701]] and ±50 mV [[adi>ADuM7702]]. The pseudo-differential input is ideally suited to shunt voltage monitoring in high voltage applications where galvanic isolation is required. | The [[adi>ADuM7701]] is a high performance, second-order, Σ-Δ modulator that converts an analog input signal into a high speed, single-bit data stream, with on-chip digital isolation based on Analog Devices, Inc., iCoupler® technology. The device operates from a 4.5 V to 5.5 V power supply range (VDD1) and accepts a pseudo differential input signal of ±250 mV (±320 mV full-scale). The pseudo differential input is ideally suited to shunt voltage monitoring in high voltage applications where galvanic isolation is required. |
| |
| The analog input is continuously sampled by a high performance analog modulator, and converted to a ones density digital output stream with a data rate of up to 25 MHz. The original information can be reconstructed with an appropriate digital filter to achieve 85 dB signal to noise ratio (SNR) at 78.1 kSPS with a 20 MHz MCLK. The serial input/output can use a 5 V or a 3.3 V supply (VDD2). | The analog input is continuously sampled by a high performance analog modulator and converted to a ones density digital output stream with a data rate of up to 21 MHz. The original information can be reconstructed with an appropriate sinc3 digital filter to achieve an 86 dB signal-to-noise ratio (SNR) at 78.1 kSPS with a 256 decimation rate and a 20 MHz master clock. The serial input and output operates from a 5 V or a 3 V supply (VDD2). |
| |
| The serial interface is digitally isolated. High speed complementary metal oxide semiconductor (CMOS) technology, combined with monolithic transformer technology, means the on-chip isolation provides outstanding performance characteristics, superior to alternatives such as optocoupler devices. The [[adi>ADuM7701]]/[[adi>ADuM7702]] devices are offered in both 16-lead and 8-lead wide-body SOIC packages and have an operating temperature range of −40° C to +125° C. | The serial interface is digitally isolated. High speed complementary metal-oxide semiconductor (CMOS) technology, combined with monolithic transformer technology, results in the on-chip isolation providing outstanding performance characteristics, superior to alternatives such as optocoupler devices. The [[adi>ADuM7701]] device is available in both a 16-lead and an 8-lead wide-body SOIC and has an operating temperature range of −40°C to +125°C. |
| |
| Applications: | ==== Applications ==== |
| * Shunt current monitoring | * Shunt current monitoring |
| * AC motor controls | * AC motor controls |
| ===== HDL Reference Design ===== | ===== HDL Reference Design ===== |
| |
| The provided HDL reference design support's both the ADuM77701/2 and AD7405 devices. One of the main difference between thees two devices is the type of the digital data lines. In case of ADuM7701/2 it is a single ended lines, and in case of the AD7405 is differential. | The provided HDL reference design support's both the ADuM7701 and AD7405 devices. One of the main difference between thees two devices is the type of the digital data lines. In case of ADuM7701 it is a single ended lines, and in case of the AD7405 is differential. |
| |
| User can configure the corresponding interface type, by setting the **adc_port_type** Tcl variable in the system_project.tcl file. Note that this variable should be set before generating any bit file. | User can configure the corresponding interface type, by setting the **adc_port_type** Tcl variable in the system_project.tcl file. Note that this variable should be set before generating any bit file. |
| | |
| | The output of the device is a continuous digital bit stream, to reconstruct the original input signal information, this output bit stream needs to be digitally filtered and decimated. A simple {{https://github.com/analogdevicesinc/hdl/blob/master/library/common/util_dec256sinc24b.v|sinc filter}} is recommended to reconstruct the original input signal information received from the ADuM7701. The following equation describes the transfer function of the sinc filter: |
| | |
| | <m>H(z) = (1/DR (1-Z^-DR)/(1 - Z^-1))^N</m> |
| | |
| | where **DR** is the decimation rate and **N** is the sinc filter order. The implemented filter is a 3rd order sinc filter. |
| | |
| | The output of the filter is connected to a DMA, which will handle the data transfer into the system memory. See the data path in block diagram bellow: |
| |
| {{ :resources:eval:user-guides:ad7405_data_path_1.png | ADuM7701/AD7405 data path }} | {{ :resources:eval:user-guides:ad7405_data_path_1.png | ADuM7701/AD7405 data path }} |
| |
| The output of the device is a continuous digital bit stream, to reconstruct the original input signal information, this output bit stream needs to be digitally filtered and decimated. The {{https://github.com/analogdevicesinc/hdl/blob/adum7701/library/common/util_dec256sinc24b.v|sinc filter}} recommended in the device's data sheet was used in the reference design. The output of the filter is connected to a DMA, which will handle the data transfer into the system memory. See the data path in block diagram bellow: | The external clock rate (MCLKIN) can be set in the system_bd.tcl file, by changing the value of the **ext_clk_rate** variable. |
| |
| The external clock rate (MCLKIN) of can be set in the system_bd.tcl file, by changing the value of the **ext_clk_rate** variable. | ===== Create the project with SDK ===== |
| | |
| | {{page>:resources:fpga:xilinx:software_setup}} |
| |
| ===== Driver Description ===== | ===== Driver Description ===== |
| * {{https://github.com/analogdevicesinc/hdl/tree/adum7701|HDL Reference Design}} | * {{https://github.com/analogdevicesinc/hdl/tree/adum7701|HDL Reference Design}} |
| </WRAP> | </WRAP> |
| | bbbbbbbb |
