This version is outdated by a newer approved version.
This version (11 Oct 2018 20:51) is a draft.
Approvals: 0/1The Previously approved version (02 Nov 2017 14:24) is available.
This version (11 Oct 2018 20:51) is a draft.Approvals: 0/1The Previously approved version (02 Nov 2017 14:24) is available.
This is an old revision of the document!
Table of Contents
ADRV936x RF SOM Hardware
Whether you want to understand the changes between revisions, or just understand how to probe the PCB, this is where all the information should be.
The physical dimensions of the connectors, mounting holes and PCB is common between the ADRV9361-Z7035 and the ADRV9364-Z7020.
The Footprint is common between the two parts:
The connector pinouts are a superset:
Carrier Card Connector Dimensions:
ADRV9361-Z7035 Hardware
Revision F
This is the current shipping version.
Revision E
- Rev E Allegro Board File (This file is compressed). Get the Allegro FREE Physical Viewer (You need 16.6 or higher).
Why do a Rev F?
- The schematic did not change. We only made an adjustment to the layout.
- The RF traces were modified to improve the insertion loss and the return loss as well as the EVM.
Revision C (First publicly available revision)
This is the first publicly available revision.
Why do a Rev D?
- Improved the power structure and increased the 0.95V current from 2A to 6A
- Added a 1000BASE-KX option for the Ethernet Phy (Ethernet Operation over Electrical Backplanes)
- Improved the layout to accommodate the power changes.
ADRV9364-Z7020 Hardware
Revision D
This is the current shipping version.
-
- There was a small typo in the rev D0 of the schematics (below), the net named
*_EN_AGC, was tied to theENABLEpin, and the net called*_ENABLEwas tied to theEN_AGCpin. This is fixed/updated in this schematic. copper/layout does not change, only the designation on the wire (for clarity).
-
- This has the notation error described above.
- Rev D Allegro Board File (This file is compressed). Get the Allegro FREE Physical Viewer (You need 16.6 or higher).
Revision C
This is the first publicly available revision.
Why do a Rev D?
- Improved the power structure and increased the 1V current from 2A to 4A
- Improved the layout to accommodate the power changes.
- Added a 1000BASE-KX option for the Ethernet Phy (Ethernet Operation over Electrical Backplanes)
- Improved the RF traces to have better insertion loss and return loss.
Support
Please refer to EngineerZone with questions on hardware/schematics/or using the ADRV936x RF SOMs.
resources/eval/user-guides/adrv936x_rfsom/hardware.1539283893.txt.gz · Last modified: 11 Oct 2018 20:51 by Neil Wilson