Differences

This shows you the differences between two versions of the page.

--- resources:eval:user-guides:adrv9002:quickstart:zynq [25 Nov 2021 10:43] – [LVDS support] Laszlo Nagy
+++ resources:eval:user-guides:adrv9002:quickstart:zynq [25 Nov 2021 10:49] – [LVDS support] Laszlo Nagy
@@ Line 14: / Line 14: @@
 According to [[https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf|7 Series Select IO guide]] section 'LVDS and LVDS_25' and Table 1-43 the LVDS I/O standard (VADJ 1.8V) is not supported on High Range banks.
-Since the evaluation board can operate only with VADJ set to 1.8V and the FMC connector on the carrier (ZC706,Zedborad) is mapped to HR banks the **<fc #ff0000>LVDS interface is not supported</fc>**.
+Since the evaluation board can operate only with <fc #ff0000>**VADJ set to 1.8V**</fc> and the FMC connector on the carrier (ZC706, Zedborad) is mapped to HR banks the **<fc #ff0000>LVDS interface is not supported</fc>**.

Wiki