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resources:eval:user-guides:adin1300-and-adin1200:cap-coupling [04 Dec 2020 13:21] – Title Change and Aaron Paulo Herediaresources:eval:user-guides:adin1300-and-adin1200:cap-coupling [04 Dec 2020 19:33] – updated '1200 and 1300 pics Catherine Redmond
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 Figure 1(a) shows a typical ADIN1300 (or ADIN1200) Ethernet PHY Media Dependent Interface Connection with magnetics for galvanic isolation. Figure 1(b)  shows the recommended circuit using capacitive coupling. In this case, the transformer is replaced with a capacitor in each path from MDI pins to the RJ-45 connector. Proper selection of capacitors, layout recommendations, and other guidelines are discussed in the succeeding sections. Figure 1(a) shows a typical ADIN1300 (or ADIN1200) Ethernet PHY Media Dependent Interface Connection with magnetics for galvanic isolation. Figure 1(b)  shows the recommended circuit using capacitive coupling. In this case, the transformer is replaced with a capacitor in each path from MDI pins to the RJ-45 connector. Proper selection of capacitors, layout recommendations, and other guidelines are discussed in the succeeding sections.
  
-{{ :resources:eval:user-guides:adin1300-and-adin1200:figure_1._typical_ethernet_application_configuration_for_adin1300_with_magnetics_a_or_capacitive_coupling_b_.png?nolink |}} 
-Figure 1. Typical Ethernet application configuration for ADIN1300 with Magnetics (a) or Capacitive Coupling (b) 
  
-For ADIN1200, two pairs of the MDI must all contain a capacitor, the same as the ADIN1300. Figure 2 shows the recommended circuit for capacitively coupled ADIN1200 circuit.  +{{ :resources:eval:user-guides:adin1300-and-adin1200:adin1300_magnetics.jpg |}}
  
-{{ :resources:eval:user-guides:adin1300-and-adin1200:adin1200_cap_coupling.png?nolink |}}+//Figure 1. Typical Ethernet application configuration for ADIN1300 with Magnetics (a) or Capacitive Coupling (b)// 
 + 
 +For ADIN1200, two pairs of the MDI must all contain a capacitor, the same as the ADIN1300. Figure 2 shows the recommended circuit for capacitively coupled ADIN1200 circuit.  
  
-Figure 2. Typical Ethernet application configuration for ADIN1200 with Magnetics (a)  or Capacitive Coupling (b) 
  
 +{{ :resources:eval:user-guides:adin1300-and-adin1200:1200_capcouple_transformer.jpg |}}
 +//Figure 2. Typical Ethernet application configuration for ADIN1200 with Magnetics (a)  or Capacitive Coupling (b)
 +//
 **<fc #4682b4>CAPACITIVE COUPLING</fc>** **<fc #4682b4>CAPACITIVE COUPLING</fc>**
  
-A properly selected capacitance value is required by following these guidelines. +<note tip>tip</note>A properly selected capacitance value is required by following these guidelines. 
-1. Using non-polarized capacitors. +  - Using non-polarized capacitors. 
-2. The capacitors must meet the isolation requirements as specified in Clause 40.6.1.1(ac and dc isolation). +  - The capacitors must meet the isolation requirements as specified in Clause 40.6.1.1(ac and dc isolation). 
-3. Use 33 nF capacitor value as recommended.+  - Use 33 nF capacitor value as recommended.
 The capacitor value is calculated by following the required 3 radians phase angle over a frequency range of 2-80 MHz according to ANSI INCITS 263-1995 in order to meet the return loss requirement according to IEEE 802.3 33.4.7 subclause. The capacitor value is calculated by following the required 3 radians phase angle over a frequency range of 2-80 MHz according to ANSI INCITS 263-1995 in order to meet the return loss requirement according to IEEE 802.3 33.4.7 subclause.
-{{ :resources:eval:user-guides:adin1300-and-adin1200:second_formula.jpg?nolink&600 |}} +{{ :resources:eval:user-guides:adin1300-and-adin1200:second_formula.jpg?nolink&300 |}} 
-{{ :resources:eval:user-guides:adin1300-and-adin1200:first_formula.jpg?nolink |}}+{{ :resources:eval:user-guides:adin1300-and-adin1200:first_formula.jpg?nolink&300 |}}
  
 The value of recommended capacitance would be **C = 30.369 nF ≈ 33 nF** The value of recommended capacitance would be **C = 30.369 nF ≈ 33 nF**
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 **PROTECTION** **PROTECTION**
 {{ :resources:eval:user-guides:adin1300-and-adin1200:tvs_and_cmc.jpg?nolink&600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:tvs_and_cmc.jpg?nolink&600 |}}
-Figure 3. TVS and Common Mode Choke Applied to ADIN1300/ADIN1200+//Figure 3. TVS and Common Mode Choke Applied to ADIN1300/ADIN1200//
  
 It is advisable to put a TVS on the MDI of the ADIN1300 and ADIN1200 for protection against ESD, fast transients, and surges. The TVS is placed in between the ADIN1300/ADIN1200 MDI pins and blocking capacitors. It is advisable to put a TVS on the MDI of the ADIN1300 and ADIN1200 for protection against ESD, fast transients, and surges. The TVS is placed in between the ADIN1300/ADIN1200 MDI pins and blocking capacitors.
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 {{ :resources:eval:user-guides:adin1300-and-adin1200:single_cap_backplane.jpg?nolink |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:single_cap_backplane.jpg?nolink |}}
  
-Figure 4. ADIN1300 Configuration for Backplane Applications (Single Capacitor)+//Figure 4. ADIN1300 Configuration for Backplane Applications (Single Capacitor)//
  
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:cap_with_cable.jpg?nolink |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:cap_with_cable.jpg?nolink |}}
  
-Figure 5. Capacitive Coupling Configuration (with Cable)+//Figure 5. Capacitive Coupling Configuration (with Cable)//
  
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:cap_and_magnetic.jpg?nolink |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:cap_and_magnetic.jpg?nolink |}}
  
-Figure 6. Capacitive and Magnetic Coupling Configuration (with Cable)+//Figure 6. Capacitive and Magnetic Coupling Configuration (with Cable)//
  
 //Cap - Cable - Transformer Configuration// //Cap - Cable - Transformer Configuration//
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 The ADIN1200 and ADIN1300 are capable of operating at all speeds with the capacitively coupled configuration in both forced and auto-negotiation modes. The driver architecture supports symmetrical transmission in all modes. Figure 4 to Figure 7 show typical signaling for transformer and capacitively coupled configurations measured at the cable.  The ADIN1200 and ADIN1300 are capable of operating at all speeds with the capacitively coupled configuration in both forced and auto-negotiation modes. The driver architecture supports symmetrical transmission in all modes. Figure 4 to Figure 7 show typical signaling for transformer and capacitively coupled configurations measured at the cable. 
  
-{{ :resources:eval:user-guides:adin1300-and-adin1200:fig_7.jpg?nolink |}}+{{ :resources:eval:user-guides:adin1300-and-adin1200:fig_7.jpg?nolink|}}
  
-Figure 7. Example 100 Mbps Waveform with Transformer circuit+//Figure 7. Example 100 Mbps Waveform with Transformer circuit//
  
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:fig_8.jpg?nolink |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:fig_8.jpg?nolink |}}
  
-Figure 8. Example 100 Mbps Waveform with Capacitive Coupling+//Figure 8. Example 100 Mbps Waveform with Capacitive Coupling//
  
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:fig_9.jpg?nolink |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:fig_9.jpg?nolink |}}
  
-Figure 9. Example 10 Mbps Waveform with Transformer circuit+//Figure 9. Example 10 Mbps Waveform with Transformer circuit//
  
  
-{{ :resources:eval:user-guides:adin1300-and-adin1200:fig_10.jpg?nolink |}}+{{ :resources:eval:user-guides:adin1300-and-adin1200:fig_10.jpg?nolink|}}
  
-Figure 10. Example 10 Mbps Waveform with Capacitive Coupling+//Figure 10. Example 10 Mbps Waveform with Capacitive Coupling//
  
  
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 EMC - transient immunity EMC - transient immunity
-  * High voltage transients, such as IEC 61000-4-4 EFT to the Cat5e cable will result in overvoltage at the Ethernet ADIN13000 MDI pins.+  * High voltage transients, such as IEC 61000-4-4 EFT to the Cat5e cable will result in overvoltage at the Ethernet ADIN1300 MDI pins.
   * If using capacitive isolation, a TVS is recommended to clamp the overvoltage.   * If using capacitive isolation, a TVS is recommended to clamp the overvoltage.
   * Using a low capacitance TVS, such as the SP4065-08ATG will help to protect the ADIN1300 Ethernet PHY.    * Using a low capacitance TVS, such as the SP4065-08ATG will help to protect the ADIN1300 Ethernet PHY. 
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 Figure 11 shows a block diagram representation of an EMC simulation schematic. This simulation investigates the robustness of the Ethernet physical interface to IEC 61000-4-4 Electrical Fast Transients (EFT). The EFT source is injected at 1kV and at 4kV. The TVS used is the SP4065-08ATG, with 4.4pF typical capacitance, and a 1A clamp voltage of 5.5V. Two meters of standard Cat5e is used in the simulation model. The EFT source is injected through a 100 pF capacitor to the Cat5e cable shield, at 0.5 meters from the Ethernet interface. The interface includes 33nF series capacitive isolation.  Figure 11 shows a block diagram representation of an EMC simulation schematic. This simulation investigates the robustness of the Ethernet physical interface to IEC 61000-4-4 Electrical Fast Transients (EFT). The EFT source is injected at 1kV and at 4kV. The TVS used is the SP4065-08ATG, with 4.4pF typical capacitance, and a 1A clamp voltage of 5.5V. Two meters of standard Cat5e is used in the simulation model. The EFT source is injected through a 100 pF capacitor to the Cat5e cable shield, at 0.5 meters from the Ethernet interface. The interface includes 33nF series capacitive isolation. 
 {{ :resources:eval:user-guides:adin1300-and-adin1200:capiso_sch.png?600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:capiso_sch.png?600 |}}
-Figure 11. EMC simulation block diagram+//Figure 11. EMC simulation block diagram//
  
 **Running this simulation without TVS** results in overvoltage on the Ethernet MDI pins. Figures 12 (for 1 kV EFT) and 13 (for 4 kV EFT) show that 100 to 400V overvoltage will be present on the Ethernet MDI pins. **Running this simulation without TVS** results in overvoltage on the Ethernet MDI pins. Figures 12 (for 1 kV EFT) and 13 (for 4 kV EFT) show that 100 to 400V overvoltage will be present on the Ethernet MDI pins.
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:12.png?600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:12.png?600 |}}
-Figure 12. Running simulation without TVS and 1 kV EFT+//Figure 12. Running simulation without TVS and 1 kV EFT//
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:13.png?600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:13.png?600 |}}
-Figure 13. Running simulation without TVS and 4 kV EFT+//Figure 13. Running simulation without TVS and 4 kV EFT//
  
 **Running this simulation with TVS** results in much better performance. Most of the EFT noise is shunted to ground using the TVS, as shown in Figures 14 and 15. The pin voltage is < 10V for very short time periods, unlikely to cause ADIN1300 damage. The ringing in some of the waveform edges is very high frequency, & very unlikely to be present in the real system. **Running this simulation with TVS** results in much better performance. Most of the EFT noise is shunted to ground using the TVS, as shown in Figures 14 and 15. The pin voltage is < 10V for very short time periods, unlikely to cause ADIN1300 damage. The ringing in some of the waveform edges is very high frequency, & very unlikely to be present in the real system.
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:14.png?600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:14.png?600 |}}
-Figure 14. Running simulation with TVS and 1 kV EFT+//Figure 14. Running simulation with TVS and 1 kV EFT//
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:15.png?600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:15.png?600 |}}
-Figure 15. Running simulation with TVS and 4 kV EFT+//Figure 15. Running simulation with TVS and 4 kV EFT//
  
-When adding the TVS to the Ethernet capacitive isolation architecture there is one additional question - is there any degradation in signal integrity? This can be simulated by injecting a MLT-3 31.25 MHz signal on each MDI pin (corresponding to 100 Mbps Etherent MII). Simulation shows that adding 33nF series capacitors, with TVS and 2 meters of cabling does not attenuate signalling. Some minor signal reflections are likely to occur (due to cable effects) as shown in Figure 16, but differential signalling levels are not effected.+When adding the TVS to the Ethernet capacitive isolation architecture there is one additional question - is there any degradation in signal integrity? This can be simulated by injecting a MLT-3 31.25 MHz signal on each MDI pin (corresponding to 100 Mbps Ethernet MII). Simulation shows that adding 33nF series capacitors, with TVS and 2 meters of cabling does not attenuate signaling. Some minor signal reflections are likely to occur (due to cable effects) as shown in Figure 16, but differential signaling levels are not effected.
  
 {{ :resources:eval:user-guides:adin1300-and-adin1200:16.png?600 |}} {{ :resources:eval:user-guides:adin1300-and-adin1200:16.png?600 |}}
-Figure 16. Signal integrity simulation - using Capacitive Isolation and TVS on the MDI Interface+//Figure 16. Signal integrity simulation - using Capacitive Isolation and TVS on the MDI Interface// 
 + 
 +----
  
 **CONCLUSION** **CONCLUSION**
resources/eval/user-guides/adin1300-and-adin1200/cap-coupling.txt · Last modified: 11 Feb 2021 12:21 by Catherine Redmond

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