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resources:eval:user-guides:adaq7980-sdz [22 Mar 2018 13:29]
CsomI Add HDL user guide
resources:eval:user-guides:adaq7980-sdz [22 Mar 2018 13:30] (current)
CsomI Fix system_bd.tcl link
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 ==== Design Configuration ==== ==== Design Configuration ====
  
-The reference design uses an integrated pulse generator to synchronise the capture events during continuous conversion. The required sampling rate can be set in [[https://​github.com/​analogdevicesinc/​hdl/​blob/​master/​projects/​ad738x_fmc/​zed/​system_bd.tcl|system_bd.tcl]] file to the required values:+The reference design uses an integrated pulse generator to synchronise the capture events during continuous conversion. The required sampling rate can be set in [[https://​github.com/​analogdevicesinc/​hdl/​blob/​master/​projects/​adaq7980_sdz/​zed/​system_bd.tcl|system_bd.tcl]] file to the required values:
  
 1) The targeted sampling rate: 1) The targeted sampling rate:
resources/eval/user-guides/adaq7980-sdz.txt · Last modified: 22 Mar 2018 13:30 by CsomI