The most recent version of this page is a draft.
This version is outdated by a newer approved version.This version (09 May 2019 15:07) is a draft.
Approvals: 0/1
This version is outdated by a newer approved version.This version (09 May 2019 15:07) is a draft.Approvals: 0/1
This is an old revision of the document!
AD9208-DUAL-EBZ HDL reference design
Functional Overview
The AD9208-DUAL-EBZ reference design is a processor based (e.g. Microblaze) embedded system. The device interfaces to the FPGA transceivers followed by the individual JESD204B and ADC cores. The cores are programmable through an AXI-Lite interface. The samples are passed to the system memory (DDR).
The reference design supports the following evaluation board:
| Hardware | Evaluation Document |
|---|---|
| DUAL-AD9208 | DUAL-AD9208 |
Supported Carriers
* VCU118 FMC+ Slot
Block Diagram
The data path and clock domains are depicted on the below diagram.
Support
Analog Devices will provide limited online support for anyone using the core with Analog Devices components (ADC, DAC, Video, Audio, etc) via the EngineerZone.
resources/eval/user-guides/ad9208_dual_ebz/ad9208_dual_ebz_hdl.1557407273.txt.gz · Last modified: 09 May 2019 15:07 by Laszlo Nagy