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This version (26 Jan 2023 14:18) was approved by Joyce Velasco.The Previously approved version (19 Aug 2022 09:04) is available.Diff

AD777x Customer Evaluation Board User Guide

The EVAL-AD7770-ARDZ / EVAL-AD7771-ARDZ / EVAL-AD7779-ARDZ evaluation kit features the AD7770, AD7771, and AD7779 24-bit, analog-to-digital converters (ADCs). The board interfaces with the system demonstration platform SDP-K1 controller board (EVAL-SDP-CK1Z), with the DE10-Nano development kit and with any microcontroller supported by Mbed platform via Arduino interface. The controller board can supply power to the EVAL-AD7770-ARDZ/EVAL-AD7771-ARDZ/EVAL-AD7779-ARDZ evaluation board and also connects to a PC running a Windows® operating system via a USB cable.

The AD777x evaluation software fully configures the AD7770, AD7771, and AD7779 device register functionality and provides dc and ac time domain analysis in the form of waveform graphs, histograms, and associated noise analysis for ADC performance evaluation.

This kit allows the user to evaluate the features of the ADC. The user PC software executable controls the AD7770, AD7771, and AD7779 over the USB cable through the controller board.

Full specifications for the AD7770, AD7771, or AD7779 are available in the AD7770, AD7771, or AD7779 data sheets and should be consulted in conjunction with this user guide when working with the evaluation board

The AD777x Family

The AD777x is an 8-channel, simultaneous sampling analog-to-digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The AD777x provides an ultralow input current to allow direct sensor connection. Each input channel has a programmable gain stage allowing gains of 1, 2, 4, and 8 to map lower amplitude sensor outputs into the full-scale ADC input range, maximizing the dynamic range of the signal chain.

Each channel contains an ADC modulator and a sinc3/sinc5 (AD7770 and AD7779 just sinc3), low latency digital filter. A sample rate converter (SRC) is provided to allow fine resolution control over the AD777x output data rate (ODR). This control can be used in applications where the ODR resolution is required to maintain coherency with 0.01 Hz changes in the line frequency.

The SRC is programmable through the serial port interface (SPI). The AD777x implements two different interfaces: a data output interface and SPI control interface. The ADC data output interface is dedicated to transmitting the ADC conversion results from the AD777x to the processor. The SPI writes to and reads from the AD777x configuration registers and for the control and reading of data from the successive approximation register (SAR) ADC. The SPI can also be configured to output the Σ-Δ conversion data.

The AD777x includes a 12-bit SAR ADC. This ADC can be used for AD777x diagnostics without having to decommission one of the Σ-Δ ADC channels dedicated to system measurement functions. With the use of an external multiplexer, which can be controlled through the three general-purpose input/output pins (GPIOs), and signal conditioning, the SAR ADC can validate the Σ-Δ ADC measurements in applications where functional safety is required. In addition, the AD777x SAR ADC includes an internal multiplexer to sense internal nodes.

Evaluation board Features

  • Full featured evaluation board for the AD777x
  • PC control in conjunction with the system demonstration platform (EVAL-SDP-CK1Z/DE10-Nano)
  • PC software for control and data analysis (time and frequency domain)
  • Standalone capability

Evaluation Kit

  • EVAL-AD777x-ARDZ-Rev A Evaluation Board

Associated Software

Quick Start Guide

The following steps highlight the process to begin using the evaluation board.

Equipment Required

  1. PC running Windows with a USB2.0 port and software installed.
  2. Controller Board
    1. Option A: EVAL-SDP-CK1Z and a USB-C cable
    2. Option B: DE10-Nano kit and a Micro-USB cable

Getting started

Ensure the SDP board is not connected to the USB port of the PC
  1. Install the Ace Plugin
  2. Connect the EV-AD4170-ASD1Z-U1 to the controller board
    1. Option A: Connect the EV-AD4170-ASD1Z-U1 to the EVAL-SDP-CK1Z
      1. Using the 120 pin connector
        • Screw the two boards together using the plastic screw-washer set included in the evaluation board kit to ensure that the boards are connected firmly together.
      2. Using the Arduino Connectors
    2. Option B: Connect the EV-AD4170-ASD1Z-U1 to the EVAL-SDP-CB1Z
      • Using the 120 pin connector
        • Screw the two boards together using the plastic screw-washer set included in the evaluation board kit to ensure that the boards are connected firmly together.
  3. If using Windows® XP, it may be needed to search for the controller board drivers. Choose to automatically search for the drivers for the controller board if prompted by the operating system.
  4. Launch the ACE plugin from the Analog Devices subfolder in the Programs Menu.

Hardware Guide

The EVAL-AD777x-ARDZ has been designed in such a way that the user can configure the ADC as close as possible as in their final application. For that purpose the board has multiple jumpers and solder link that allows the user to change the configuration easily.

The possible configuration are:

  1. Bipolar / Unipolar supplies.
  2. External / Internal power supplies.
  3. Internal / External reference with/out buffer pin.
  4. Pin Control / SPI mode.
  5. Multiplexer for SAR debugging.
  6. Multiple clock sources.
  7. Multiple zio extension options
  8. Possibility to connect external Signal chain via surfing connector

More detail explained in the following sections

Block Diagram

Connectors

Table 1. SMB connectors

Connector Pin Signal
J1 1 AIN0+ (Analog input signal 0+)
J2 1 AIN0- (Analog input signal 0-)
J3 1 AIN1+ (Analog input signal 1+)
J4 1 AIN1- (Analog input signal 1-)
J5 1 AIN2+ (Analog input signal 2+)
J6 1 AIN2- (Analog input signal 2-)
J7 1 AIN3+ (Analog input signal 3+)
J8 1 AIN3- (Analog input signal 3-)
J10 1 External reference source
J13 1 External clock source

Table 2. External AVDDx/AVSSx

Connector Pin Signal
P7 1 External AVDD1
P7 2 External AVDD2
P7 3 External AVDD4
P7 4 External AVSSX
P7 5 GND

Table 3. External AVDDx/AVSSx

Connector Pin Signal
P8 1 External IOVDD
P8 2 GND

Table 4. External VIN

Connector Pin Signal
P8 1 External VIN
P8 2 GND

Table 5. Analog input signals

Connector Pin Signal
P11 1 AIN0- (Analog input signal 0-)
P11 2 AIN0+ (Analog input signal 0+)
P11 3 AIN1- (Analog input signal 1-)
P11 4 AIN1+ (Analog input signal 1+)
P11 5 AIN2- (Analog input signal 2-)
P11 6 AIN2+ (Analog input signal 2+)
P11 7 AIN3- (Analog input signal 3-)
P11 8 AIN3+ (Analog input signal 3+)
P12 1 AIN7+ (Analog input signal 7+)
P12 2 AIN7- (Analog input signal 7-)
P12 3 AIN6+ (Analog input signal 6+)
P12 4 AIN6- (Analog input signal 6-)
P12 5 AIN5+ (Analog input signal 5+)
P12 6 AIN5- (Analog input signal 5-)
P12 7 AIN4+ (Analog input signal 4+)
P12 8 AIN4- (Analog input signal 4-)

Table 6. Surfing connector

Connector Pin Signal
P14 1 AIN7+ unfiltered
P14 2 GND
P14 3 VNEG for external board supply
P14 4 VCM_OUT
P14 5 VPOS for external board supply
P14 6 GND
P14 7 AIN7- unfiltered
P18 1 AIN7+ unfiltered
P18 2 GND
P18 3 N.C.
P18 4 N.C.
P18 5 N.C.
P18 6 GND
P18 7 AIN7- unfiltered

Table 7. External reference voltage

Connector Pin Signal
P20 1 Vref
P20 2 AVSSx

Table 8. Interface connectors

Connector Pin Signal
P1 1 NC
P1 2 IOREF
P1 3 RESET
P1 4 +3.3V
P1 5 +5V
P1 6 GND
P1 7 GND
P1 8 VIN
P2 1 NC
P2 2 NC
P2 3 NC
P2 4 NC
P2 5 NC
P2 6 NC
P3 1 ALT_SPI_MISO
P3 2 +5V
P3 3 ALT_SPI_SCL
P3 4 ALT_SPI_MOSI
P3 5 RESET
P3 6 GND
P4 1 DRDY_N
P4 2 DCLK
P4 3 CS_N
P4 4 ARD_SPI_MOSI
P4 5 ARD_SPI_MISO
P4 6 ARD_SPI_SCK
P4 7 GND
P4 8 N.C.
P4 9 SCL
P4 10 SDA
P5 1 DOUT3
P5 2 CONVST
P5 3 RESET_N
P5 4 EXT_MCLK
P5 5 DOUT2
P5 6 DOUT1
P5 7 DOUT0
P5 8 START_N

Table 9. PMOD connectors

Connector Pin Signal
P16 1 ALERT
P16 2 SYNC_OUT_N
P16 3 SYNC_IN_N
P16 4 VIO
P16 5 GND
P16 6 IOVDD
P16 7 GPIO0
P16 8 GPIO1
P16 9 GPIO2
P16 10 ARD_EXT_VIN
P16 11 GND
P16 12 IOVDD
P24 1 CS_N
P24 2 SDI
P24 3 SDO
P24 4 SCLK
P24 5 GND
P24 6 IOVDD
P24 7 EXT_MCLK
P24 8 DRDY_N
P24 9 DCLK
P24 10 DOUT
P24 11 GND
P24 12 IOVDD
P30 1 START_N
P30 2 DOUT1
P30 3 DOUT2
P30 4 DOUT3
P30 5 GND
P30 6 IOVDD
P30 7 RESET_N
P30 8 CONVST
P30 9 GND
P30 10 GND
P30 11 GND
P30 12 IOVDD

Jumper configuration

Table 10. EVAL jumpers and switches

Power Supply Connector Voltage Range
S1 Pos. 1-2; 4-5 AVDD configuration: (1) Pos.1-2 and 4-5 ⇒ BIPOLAR: AVDD = 1.65V, AVSSX = -1.65V (2) Pos.3-2 and 6-5 ⇒ UNIPOLAR: AVDD = 3.3V, AVSSX=0V
JP1 Pos. B AVSSX configuration: (1) Pos.A ⇒ EXT_AVSSX (2) Pos.B ⇒ ADP7182
JP2 Pos. B AVDD1 configuration: (1) Pos.A ⇒ AVDD1 = EXT_AVDD1 (2) Pos.B ⇒ AVDD1 = ADP7118
JP3 Pos. B AVDD2 configuration: (1) Pos.A ⇒ AVDD2 = EXT_AVDD2 (2) Pos.B ⇒ AVDD2 = ADP7118
JP4 Pos. B AVDD4 configuration: (1) Pos.A ⇒ AVDD4 = EXT_AVDD4 (2) Pos.B ⇒ AVDD4 = ADP7118
JP5 Pos. A Power supply for the Reference: (1) Pos.A ⇒ AVDD1 (2) Pos.B ⇒ VPOS
JP6 Pos. A ALERT configuration: (1) Pos.A ⇒ ALERT_SPI (2) Pos.B ⇒ ALERT_PIN
JP7 Pos. A FORMAT1 configuration: (1) Pos.A ⇒ FORMAT1 = 1 (2) Pos.B ⇒ FORMAT1 = 0 (3) [FORMAT0, FORMAT1] = [1,1] ⇒ SPI CONTROL MODE (4) [FORMAT0, FORMAT1] = [0,X] ⇒ PIN CONTROL MODE (5) [FORMAT0, FORMAT1] = [X,0] ⇒ PIN CONTROL MODE
JP8 Pos. A FORMAT0 configuration: (1) Pos.A ⇒ FORMAT1 = 1 (2) Pos.B ⇒ FORMAT1 = 0 (3) [FORMAT0, FORMAT1] = [1,1] ⇒ SPI CONTROL MODE (4) [FORMAT0, FORMAT1] = [0,X] ⇒ PIN CONTROL MODE (5) [FORMAT0, FORMAT1] = [X,0] ⇒ PIN CONTROL MODE
JP9 Pos. B CLK selection: (1) Pos.A ⇒ CLK_SEL = 1 = Crystal (2) Pos.B ⇒ CLK_SEL = 0 = CMOS
P10 Inserted Power from Arduino
P13 Pos. 5-6 IOVDD configuration: (1) Pos.1-2 ⇒ EXT_IOVDD (2) Pos.3-4 ⇒ VIO (3) Pos.5-6 ⇒ ADP7118 reference
P19 Pos. 3-4 VCM_OUT configuration: (1) Pos.1-2 ⇒ VCM_OUT = VCM (2) Pos.3-4 ⇒ VCM_OUT = ADA4896 (3) Pos.5-6 ⇒ VCM_OUT = GND
P22 Pos. 1-2 MODE3/ALERT configuration:(A) PIN control MODE: (1) Pos.3-4 ⇒ MODE3 = 1 = decimation configuration (2) Pos.5-6 ⇒ MODE3 = 0 = decimation configuration (B) SPI control MODE: (1) Pos.1-2 ⇒ ALERT_SPI
P23 Pos. 1-2 MODE1/ALERT configuration: (A) PIN control MODE: (1) Pos.3-4 ⇒ MODE1 = 1 = decimation configuration (2) Pos.5-6 ⇒ MODE1 = 0 = decimation configuration (B) SPI control MODE: (1) Pos.1-2 ⇒ ALERT_SPI
P25 Pos. 1-2 MODE2/ALERT configuration: (A) PIN control MODE: (1) Pos.3-4 ⇒ MODE2 = 1 = decimation configuration (2) Pos.5-6 ⇒ MODE2 = 0 = decimation configuration (B) SPI control MODE: (1) Pos.1-2 ⇒ ALERT_SPI
P26 Pos. 1-2 MODE0/ALERT configuration: (A) PIN control MODE: (1) Pos.3-4 ⇒ MODE0 = 1 = decimation configuration (2) Pos.5-6 ⇒ MODE0 = 0 = decimation configuration (B) SPI control MODE: (1) Pos.1-2 ⇒ ALERT_SPI
P27 Pos. 1-2 CONVST configuration: (A) PIN control MODE: (1) Pos.1-2 ⇒ CONVST_SAR = 1 = output via SPI (2) Pos.3-4 ⇒ CONVST_SAR = Start for SAR conversion (3) Pos.5-6: CONVST_SAR = 0 ⇒ output via DOUTx (B) SPI control MODE: (1) CONVST_SAR works as start for SAR
P28 Open MUX connected to AUX+
P29 Open MUX connected to AUX-
P33 Removed AVSSX connection to GND
P34 Removed AVSSX connection to GND
P35 Removed AVSSX connection to GND
P36 Removed AVSSX connection to GND
P37 Removed AVSSX connection to GND

Schematic

Top Level

The top level is formed by the interconnection of all different blocks: Power supplies, Analog filter, reference, ADC and the interface.

The input power for the EVAL is either externally supplied by P9 or by the host connected with the Arduino interface. This voltage is internally used in the “POWERSUPPLIES” block to generate AVDD and IOVDD.

P7 and P8 are used to generate externally AVDD and IOVDD and supply the ADC.

Jumpers P33, P34, P35, P36 and P37 are used to short AVSSx to GND when Unipolar supply is used and thereby reduce the noise in the different ground layers.

Power Supplies

The AD777x family requires up to 5 different supply voltages which can be easily configured thanks to jumpers and the switch S1 available in the EVAL.

When the default configuration is used, the ADC supply voltages are internally generated with 3 LDOS. The LDOS are connected to the outputs of a dual DC-to-DC Switching Regulator which generates two intermediate voltage -4V and 4V. The usage of LDOs help reducing the noise injected to the ADC.

IOVDD can be selected with P13. The internal 3.3V LDO is used by default. Two other options can be configured: VIO coming from the Arduino host or an external IOVDD connected to the connector P8.

The AD777x can be operated in bipolar or unipolar mode. When S1 is in position 1-2 and 4-5, AVSS and AVDD are configured in bipolar mode. In bipolar mode U4 will generate 1.65V and AVSSx is connected to the output of JP1, which will be either -1.65V (U5) or the voltage externally connected to P7.4.

When S1 is in position 3-2 and 6-5 the ADC is configured in unipolar mode and therefore AVSSX is grounded and AVDDx is either the external voltage connected to P7.1, P7.2 and P.7.3 or the 3.3V generated by U4.

Analog Input filter

To provide some flexibility to the user, several different analog filter configurations can be found in the evaluation board. The default resistor values are 0Ohm,and the capacitors are nor populated so no filter is implemented to the input signal.

Analog input signals are connected to P11 and P12 but channels CH0, CH1, CH2 and CH3 also have a second SMB connector in case a more precise measurements are required.

CH1 and CH2 are an example of a real protection circuit for noisy industrial environments where bidirectional TVS and protection diodes are necessary for ESD protection.

If R175 and R176 are removed, CH7 can be used together AMC-ADAxxxx-2ARMZ (Amplifier Mezzanine Card for ADC Drivers) to test the performance of the ADC with different input filter. The AMC can support any of Analog Devices operational amplifiers and ADC drivers in different packages. The user can configure the ADC driver as a Sallen-Key low-pass, high-pass, or band-pass filter, as a multiple feedback low-pass, high-pass, or band-pass filter, or as an inverting and noninverting operational amplifier. The user can also configure the AMC to drive a single-ended, fully differential, or a single-ended signal to a differential ADC.

VCM and Reference

This block is the responsible for the generation of the ADC reference and the common mode voltage.

Depending on the resistor mounted (R102, R101 or R103) the ADC reference voltage can be supplied by an discrete reference (R102), by the ADC itself (R101) or by a buffer connected to the output of the reference mentioned before (R103). Furthermore, two connector are provided (J10 and P20) just in case an external reference is desired.

The default Reference IC used in the EVAL is the LTC665LNBHMS8-2.5 but it is also possible to replace this reference with LTC6658BHMS8-2.5 or with ADR441ARMZ in which case the proper components must be mounted.

P19 is used to select the ADC common mode voltage. There are two option: connect the common mode voltage directly to the ADC's output VCM or use a intermediate buffer.

Interface

The AD777x communicates with the host via SPI. There are four primary signals: CS, SCLK, SDI, and SDO/RDY (all are inputs, except for SDO/RDY, which is an output).

Serial communication options

  1. Arduino connection
  2. PMOD connector

For an introduction to the Serial Peripheral Interface (SPI), click here

The readout values are sent to the host either via SPI commands of via DOUTx channels. Due to the limited number of readout values that a uC can process, the Zio extension has been added which allows some uC to use the audio SAI input interface to enhance the number of readout samples.

Since there exist two types of Board using the Zio extension, some resistors has been added to configure the SAI interface depending on the board selected. The resistors need to be mounted accordingly.

The EEPROM is only used for the Host to identify which EVAL has been plugged.

AD777x

The AD777x has multiple possible configurations and the following list will try to summarize how to configure it correctly with the existing hardware:

  • Clock:4 different clock sources can be used depending on the resistors mounted: Crystal, CMOS, EXT_MCLK from Arduino interface or connector J13.
  • SPI/ PIN control mode can be configured via JP7 (FORMAT1) and JP8 (FORMAT0). If both jumpers are set high, the device is configured in SPI control mode, otherwise pin control mode.
  • P22, P23, P25 and P26, are used to configured the decimation rate and the number of channels in pin control mode. In SPI mode control P23, P25 and P25 can cause a conflict with the configuration of the pins if they are configured as an output, so care must be taken with the jumper position. P22 in SPI control must be in position 1-2 since this pin will behave as an error flag.
  • JP6 is used for the host as an error flag either in SPI or pin control mode
  • R129 must be mounted if the SRC update is done via GPIO0 instead being done via SPI commands.
  • R135 and R136 must be mounted depending on the selected mode to set properly the ALER/CS pin: R136 mounted to used the pin as SPI chip selec; R135 to use the pin as error flag in pin control mode.
  • With resistors R137, R138 and R139 can be selected the MCLK divider in pin control mode. In SPI control mode only R137 must be assembled to function as SDI pin.
  • With resistors R140, R141 and R142 can be selected the MCLK divider in pin control mode. In SPI control mode only R140 must be assembled to function as SCLK pin.
  • With resistors R172, R173 and R174 can be selected the MCLK divider in pin control mode. In SPI control mode only R172 must be assembled to function as SDO pin.
  • JP9 is used for the clock source type selection: high for CMOS and low for Csytal.
  • P27 together with JP7 and JP8 is used in pin control mode for the output data format selection. In SPI control mode P27 should be connected to position 1-2. In this case CONVST_SAR works as start for SAR conversion.

Quick Start Guides

Linux on ZedBoard

Linux on DE10Nano

Reference HDL Design

Functional Overview

The reference design is a processor based (ARM) embedded system. A functional block diagram of the system is given below. The device interface is a self-contained peripheral similar to other such pcores in the system. The core is programmable through an AXI-lite interface.

Xilinx block diagram


Intel block diagram

resources/eval/user-guides/ad777x-ardz.txt · Last modified: 26 Jan 2023 14:18 by Joyce Velasco