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====== AD-FMCXMWBR1-EBZ HDL Reference Design ======

===== Supported Devices =====
  * [[adi>AD-FMCXMWBR1-EBZ]]

===== Supported Carriers =====
  * [[adi>ADRV2CRR-FMC]]

===== HDL Design Description =====

The design is built upon ADI's generic HDL reference design framework. 
More information about the framework can be found in the [[:resources/fpga/docs/hdl|ADI Reference Designs HDL User Guide]] wiki page.

The reference design uses SPI and I2C to interface with the AD-FMCXMWBR1 FMC bridge. 

For more details regarding the digital interface, check the main [[:resources/eval/user-guides/adrv9009-zu11eg/hdl| ADRV9009ZU11EG HDL Reference Design]] wiki page.

In order to build the HDL design the user has to go through the following steps:
  - Confirm that you have the right tools (see [[https://github.com/analogdevicesinc/hdl/releases|Release notes]])
  - Clone the HDL GitHub repository (see https://wiki.analog.com/resources/fpga/docs/git)
  - Build the project (see https://wiki.analog.com/resources/fpga/docs/build)

===== Control and SPI =====

The device control and monitor signals are interfaced to a GPIO module. The SPI/I2C signals are controlled by a separate AXI based SPI/I2C core.

===== AD-FMCXMWBR1-EBZ Specific Boot Files =====

<WRAP round download 80%>
 {{https://github.com/analogdevicesinc/hdl/tree/master/projects/adrv9009zu11eg/adrv2crr_fmcxmwbr1|FMCXMWBR1 HDL project}}
</WRAP>

{{page>resources/fpga/docs/hdl/downloads_insert#help_support}}

{{navigation AD-FMCXMWBR1-EBZ#.:|Hardware#.:|Reference HDL Design#.:|Software}}
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