The design is built upon ADI's generic HDL reference design framework. More information about the framework can be found in the ADI Reference Designs HDL User Guide wiki page.
The reference design uses SPI and I2C to interface with the AD-FMCXMWBR1 FMC bridge.
For more details regarding the digital interface, check the main ADRV9009ZU11EG HDL Reference Design wiki page.
In order to build the HDL design the user has to go through the following steps:
The device control and monitor signals are interfaced to a GPIO module. The SPI/I2C signals are controlled by a separate AXI based SPI/I2C core.