This version is outdated by a newer approved version.
This version (02 Dec 2014 20:12) was approved by Robin Getz.The Previously approved version (14 Oct 2014 21:50) is available.
This version (02 Dec 2014 20:12) was approved by Robin Getz.The Previously approved version (14 Oct 2014 21:50) is available.This is an old revision of the document!
Table of Contents
FMComms5 Configuration Options
RF Ports
By default the FMComms5 is configured with the Minicircuits TCM1-63AX+ baluns on the Rx1A, Rx2A, Rx1C, Tx1A, Tx2A, and Tx1B channels. This wideband balun allows for tuning across the entire 6GHz range of the AD9361, although performance may be compromised at some frequencies. The Rx1B and Rx2B channels use the Johanson 2450BL15B050E balun, which is optimized for 2.4GHz. Other balun options that are footprint compatible with this part, but optimized for other frequency bands are:
| Manufacturer | Frequency (MHz) | Balun number | Impedance | AC coupling |
|---|---|---|---|---|
| TDK | 350 | HHM1591D1 | 50/100 | 100pF |
| TDK | 900 | HHM1564A4 | 50/200 | 100pF |
| Johanson | 1450 | 1450BL15A200E | 50/200 | 20pF |
| Johanson | 1600 | 1600BL15B050E | 50/50 | 20pf |
| Anaren | 1631 | BD1631J50100A00 | 50/100 | 18pF |
| Johanson | 2450 | 2450BL15B200E | 50/200 | 9pF |
| Johanson | 2450 | 2450BL15B050E | 50/50 | 18pF |
| Hitachi | 3000 | ESLT-S370KBI | 50/50 | 10pF |
| Johanson | 5400 | 5400BL15K050E | 50/50 | 10pF |
| Hitachi | 5000 | ESLT_S540E | 50/50 | 10pF |
Additionally the Rx1B and Rx2B paths include the ADL5521 LNA and a 2.4GHz RF SAW filter. The Tx1A and Tx2A paths include the option of using capacitors to switch in the same SAW filter as well as the ADL5602 RF amplifier. These external amplifiers and filters can be used to better prototype final the final system design.
External Clock
By default the FMComms5 uses a Rakon 40MHz RXO3225M as the reference clock. This is driven into the ADCLK846, which distributes the clock to the two AD9361s, the ADF5355, as well as back to the FMC connector. It is important that the PCB trace lengths to the two AD9361s be equally matched.
This on board reference can be bypassed by placing C301 and removing R360. In this configuration an external reference clock can be injected into J301. The level of the external reference should be ensured to not exceed the ADCLK846 input conditions, and it will still be used to distribute the reference clock to the two AD9361s.
External PLL
The FMComms5 comes with the layout provisions to accept the ADF5355 when it is released in 4Q14. In the interim, an external LO signal can be injected into J302. This LO will be distributed to the two AD9361s by the Inphi 13617. Similar to the reference clock distribution, length matching is very critical for the external LO routes.
When the ADF5355 is available, it can be inserted into the design by soldering down the device, placing C331 and C332 and removing C390. In this configuration the RFOutA port of the ADF5355 port is in circuit, which allows for external LO generation up to 7GHz (divided to 3.5GHz in the AD9361). To generate an LO signal up to 8GHz (4GHz after the divide by 2 in the AD9361), the RFOutB node must be used. To select this net remove C331 and C332, and place C353 and C390.
R350 should be DNI for all configurations.
resources/eval/user-guides/ad-fmcomms5-ebz/hardware/configuration_options.1417547524.txt.gz · Last modified: 02 Dec 2014 20:12 by Robin Getz