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resources:eval:user-guides:ad-fmcomms5-ebz:hardware:configuration_options [02 Dec 2014 20:12] – [External Clock] - fix typo Robin Getz | resources:eval:user-guides:ad-fmcomms5-ebz:hardware:configuration_options [09 Jul 2019 01:51] (current) – [Rev C] Travis Collins | ||
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===== RF Ports ===== | ===== RF Ports ===== | ||
- | By default the FMComms5 is configured with the Minicircuits TCM1-63AX+ baluns on the Rx1A, Rx2A, Rx1C, Tx1A, Tx2A, and Tx1B channels. This wideband balun allows for tuning across the entire 6GHz range of the AD9361, although performance may be compromised at some frequencies. | + | By default the FMComms5 is configured with the Minicircuits |
- | ^ Manufacturer ^ Frequency (MHz) ^Balun number | + | ===== Reference Clock ===== |
- | | TDK | 350 | + | |
- | | TDK | 900 | HHM1564A4 | + | |
- | | Johanson | + | |
- | | Johanson | + | |
- | | Anaren | + | |
- | | Johanson | + | |
- | | Johanson | + | |
- | | Hitachi | + | |
- | | Johanson | + | |
- | | Hitachi | + | |
- | Additionally | + | By default |
- | ===== External Clock ===== | + | This on board reference can be bypassed by placing C301 (0.1uF) and removing R360. In this configuration an external reference clock can be injected into J301 (which is 50Ω terminated). The level of the external reference should be ensured to not exceed the [[adi> |
- | By default the FMComms5 uses a Rakon 40MHz RXO3225M as the reference clock. This is driven into the ADCLK846, which distributes the clock to the two AD9361s, the ADF5355, as well as back to the FMC connector. It is important | + | < |
- | + | ||
- | This on board reference can be bypassed by placing C301 and removing R360. In this configuration an external | + | |
===== External PLL ===== | ===== External PLL ===== | ||
- | The FMComms5 comes with the layout provisions to accept the ADF5355 | + | While the AD9361 contains two identical synthesizers to generate the required LO signals for the RF signal paths: one for the receiver and one for the transmitter, |
+ | |||
+ | ==== Rev B ==== | ||
+ | |||
+ | The FMComms5 comes with the layout provisions to accept the ADF5355. In the interim, an external LO signal can be injected into J302. This LO will be distributed to the two AD9361s by the Inphi 13617. Similar to the reference clock distribution, | ||
When the ADF5355 is available, it can be inserted into the design by soldering down the device, placing C331 and C332 and removing C390. In this configuration the RFOutA port of the ADF5355 port is in circuit, which allows for external LO generation up to 7GHz (divided to 3.5GHz in the AD9361). To generate an LO signal up to 8GHz (4GHz after the divide by 2 in the AD9361), the RFOutB node must be used. To select this net remove C331 and C332, and place C353 and C390. | When the ADF5355 is available, it can be inserted into the design by soldering down the device, placing C331 and C332 and removing C390. In this configuration the RFOutA port of the ADF5355 port is in circuit, which allows for external LO generation up to 7GHz (divided to 3.5GHz in the AD9361). To generate an LO signal up to 8GHz (4GHz after the divide by 2 in the AD9361), the RFOutB node must be used. To select this net remove C331 and C332, and place C353 and C390. | ||
- | R350 should be DNI for all configurations. | + | ==== Rev C ==== |
+ | |||
+ | The FMComms5 comes with the [[adi> | ||
+ | |||
+ | To bypass the ADF5355 and use an external LO, hardware modifications are necessary. Rotate C332 by 90 degrees, so it goes on the pad of the C390 and remove C331 placing R350. In this configuration, | ||
+ | |||
+ | <WRAP important> | ||
+ | |||
+ | {{ : | ||