no way to compare when less than two revisions
Differences
This shows you the differences between two versions of the page.
| Previous revisionLast revision | |||
| — | resources:eval:user-guides:ad-fmcomms2-ebz:hardware:functional_overview [17 Oct 2016 14:28] – [Power] remove ADP7104 and ADP190, added ADP2164 Lucian Sin | ||
|---|---|---|---|
| Line 1: | Line 1: | ||
| + | |||
| + | |||
| + | ====== Functional Overview ====== | ||
| + | |||
| + | A functional block diagram of the system is given below. The system consists of four functional partitions - receive path, transmit path, clocking and power supply. As mentioned earlier, the data path is fully integrated into AD9361. The key features of receive and transmit paths are listed below. Please refer to the device data sheet for more details. | ||
| + | |||
| + | {{: | ||
| + | |||
| + | Note: FMCOMMS2 functional block diagram coincides with the one of FMCOMMS3. | ||
| + | ===== AD9361 ===== | ||
| + | ==== Receive ==== | ||
| + | |||
| + | * Supports up to 2 direct conversion RF receive channels | ||
| + | * Fully integrated snythesizers (including loop filter) | ||
| + | * Data path consists of LNA, Demodulator, | ||
| + | * AGC, Quadrature calibration and DC offset calibration | ||
| + | * NF: 2.5dB @1GHz | ||
| + | * ADC: Continous time sigma-delta, | ||
| + | * Digital Filters: 128 complex taps, decimation between 2 and 48 | ||
| + | * Gain: 1dB step size, 80dB analog range, 30dB digital range (post ADC scaling) | ||
| + | * On-chip sensor for temperature-corrected RSSI | ||
| + | |||
| + | ==== Transmit ==== | ||
| + | |||
| + | * Supports up to 2 direct conversion RF receive channels | ||
| + | * Fully integrated snythesizers (including loop filter) | ||
| + | * Data path consists of digital filters, DAC and Modulators | ||
| + | * Digital Filters: 128 complex taps, interpolation between 2 and 48 | ||
| + | * Gain: 0.25dB step size, 86dB range. | ||
| + | * DAC: 320MSPS | ||
| + | |||
| + | ==== Clocking ==== | ||
| + | |||
| + | The clocks are managed by the device and are software programmable. Please refer to the device data sheet for the various clocks within the device. The board provides a 40MHz crystal for the AD9361. | ||
| + | |||
| + | ==== SPI ==== | ||
| + | |||
| + | The SPI signals are directly passed to the FMC connector. | ||
| + | |||
| + | ==== Control/ | ||
| + | |||
| + | The device allows real-time control via dedicated pins. These signals are passed to the FMC connector. The functionality of these pins are programmable and includes gain, synchronization, | ||
| + | |||
| + | The device also allows real-time monitoring of internal signals via another set of dedicated pins. Again, these signals are passed to the FMC connector. The internal signals are multiplexed into these pins- and details of which are best described in the data sheet. | ||
| + | |||
| + | ===== Power ===== | ||
| + | |||
| + | Key components: | ||
| + | |||
| + | | [[adi> | ||
| + | | [[adi> | ||
| + | |||
| + | |||
| + | The board receives all the power from the FPGA board through FMC. | ||
| + | |||
resources/eval/user-guides/ad-fmcomms2-ebz/hardware/functional_overview.txt · Last modified: 27 Jan 2023 14:45 by Paul Pop