A functional block diagram of the system is given below. The system consists of four functional partitions - receive path, transmit path, clocking and power supply. As mentioned earlier, the data path is fully integrated into AD9361. The key features of receive and transmit paths are listed below. Please refer to the device data sheet for more details.
Note: FMCOMMS2 functional block diagram coincides with the one of FMCOMMS3.
The clocks are managed by the device and are software programmable. Please refer to the device data sheet for the various clocks within the device. The board provides a 40MHz crystal for the AD9361.
The SPI signals are directly passed to the FMC connector.
The device allows real-time control via dedicated pins. These signals are passed to the FMC connector. The functionality of these pins are programmable and includes gain, synchronization, state machine control etc. Please refer to the data sheet for more details.
The device also allows real-time monitoring of internal signals via another set of dedicated pins. Again, these signals are passed to the FMC connector. The internal signals are multiplexed into these pins- and details of which are best described in the data sheet.
More information can be found in the AD9361 Reference Manual UG570