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resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:no_os_microblaze [24 Jul 2014 15:51] – syntax error Lucian Sinresources:eval:user-guides:ad-fmcomms1-ebz:quickstart:no_os_microblaze [22 Nov 2021 14:31] (current) Stefan-Robert Raus
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  ====== AD-FMCOMMS1-EBZ Quick Start Guide on Xilinx FPGA Boards Without OS ======  ====== AD-FMCOMMS1-EBZ Quick Start Guide on Xilinx FPGA Boards Without OS ======
 +
 +{{page>/wiki/common#retired&nofooter&noheader}}
  
 This guide provides some quick instructions on how to setup the AD-FMCOMMS1-EBZ on either: This guide provides some quick instructions on how to setup the AD-FMCOMMS1-EBZ on either:
  
-  +  * [[xilinx>AC701]]  
- +  * [[xilinx>KC705]]  
- +  * [[xilinx>VC707]]  
-^ Board     ^ XPS     ^ Vivado     ^ +  * [[xilinx>ZC702]]  
-| [[xilinx>ML605]] |  **x**  |    | +  * [[xilinx>ZC706]]  
-[[xilinx>AC701]] |      **x**  | +  * [[http://zedboard.org/product/zedboard/|Avnet ZED Board]]
-[[xilinx>KC705]]  **x**  |  **x**  | +
-[[xilinx>VC707]]  **x**  |  **x**  | +
-[[xilinx>ZC702]]  **x**  |  **x**  | +
-[[xilinx>ZC706]]  **x**  |  **x**  | +
-[[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,1028&Prod=ZEDBOARD|Digilent ZED  +
-Board]] |  **x**  |  **x**  | +
  
 <WRAP round important 80%> <WRAP round important 80%>
 \\ \\
-The XPS projects remain on this website only for legacy purposes. The support for them has been discontinued. +The ML605 XPS project remain on this website only for legacy purposes. The support for XPS projects has been discontinued. 
 </WRAP> </WRAP>
  
 +==== Required Software ====
 +  * We upgrade the Xilinx tools on every release. The supported version number can be found in our [[https://github.com/analogdevicesinc/hdl/tree/master | git repository ]]. 
  
-    +==== Required Hardware ==== 
-===== Required Software ===== +  * AD-FMCOMMS1-EBZ FMC Board 
-  * Xilinx ISE Design Suite 14.6 +  * Xilinx ML605 / Xilinx AC701 / Xilinx KC705 / Xilinx VC707 / Xilinx ZC702 / Xilinx ZC706 / Digilent ZED
-  * Xilinx Vivado 2013.4+
  
 ===== Downloads =====   ===== Downloads =====  
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 **ML605 HDL Reference Design for ISE: ** **ML605 HDL Reference Design for ISE: **
 https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm\\ https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm\\
-**KC705 HDL Reference Design for ISE: ** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm_kc705\\ 
-**VC707 HDL Reference Design for ISE: **  
-https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm_vc707\\ 
-**ZC702 HDL Reference Design for ISE: ** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm_zc702\\ 
-**ZC706 HDL Reference Design for ISE: **  
-https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm_zc706\\ 
-**ZED HDL Reference Design for ISE: ** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_xcomm_zed\\ 
 \\ \\
-**AC701 HDL Reference Design for Vivado: **+ 
 +**Latest release for Vivado** 
 +  
 +**AC701: **
 https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/ac701\\ https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/ac701\\
-**KC705 HDL Reference Design for Vivado: ** +**KC705: ** 
 https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/kc705\\ https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/kc705\\
-**VC707 HDL Reference Design for Vivado: **+**VC707: **
 https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/vc707\\ https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/vc707\\
-**ZC702 HDL Reference Design for Vivado: **+**ZC702: **
 https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/zc702\\ https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/zc702\\
-**ZC706 HDL Reference Design for Vivado: **+**ZC706: **
 https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/zc706\\ https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/zc706\\
-**ZED HDL Reference Design for Vivado: **+**ZED: **
 https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/zed\\ https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcomms1/zed\\
 +
 +**Old releases for Vivado**\\
 +
 +**For Vivado 2013.4 :**https://github.com/analogdevicesinc/hdl/tree/hdl_2014_r1/projects/fmcomms1/
 </WRAP> </WRAP>
-===== Required Hardware ===== 
-  * AD-FMCOMMS1-EBZ FMC Board 
-  * Xilinx ML605 / Xilinx AC701 / Xilinx KC705 / Xilinx VC707 / Xilinx ZC702 / Xilinx ZC706 / Digilent ZED 
  
  
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 The transmit signal may be observed using a spectrum analyzer. The receive side may be sourced by either the transmit side or a signal source. If it is the transmit side, connect an SMA cable from the transmit to receive or connect antennae on both. If it is a signal source the frequency needs to be 2.4G__+__f, 0 dBm where f is the baseband. The transmit signal may be observed using a spectrum analyzer. The receive side may be sourced by either the transmit side or a signal source. If it is the transmit side, connect an SMA cable from the transmit to receive or connect antennae on both. If it is a signal source the frequency needs to be 2.4G__+__f, 0 dBm where f is the baseband.
  
-===== Software Setup for ISE Design Suite ===== +<WRAP round info %80> 
- +The default RX gain in case of no-OS software is 10 dBThis could be too high, when an SMA cable is used for external loop-back. In this case the user should reduce the RX gain to its minimum value4.5 dB, in order to prevent saturation
-The **HDL Reference Design** for each supported Xilinx FPGA board contains a folder called //**SDK_Workspace**// which stores the Xilinx SDK project files needed to build the no-OS software and also the .bit files with the HDL design that must be programmed into the FPGA. +</WRAP>
-These are the steps that need to be followed to recreate the software project: +
-  * Copy the //**SDK_Workspace**// folder on your PC. Make sure that the path where it is stored does not contain any spaces. +
-  * Copy the no-OS drivers source code to the //**SDK_Workspace/sw/src**// folder. +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:src_files.png?400 | no-OS driver Source Files}} +
-  * Open the Xilinx SDK for XPS. When the SDK starts it asks for a to provide a folder where to store the workspace. Any folder can be provided. +
-  * In the SDK select the //**File->Import**// menu option to import the software projects into the workspace. +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:file_import.png?400 | Import Projects}} +
-  * In the //Import// window select the //**General->Existing Projects into Workspace**// option. +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:existing_project_import.png?400 | Existing Projects Import}} +
-  * In the //Import Projects// window select the //**SDK_Workspace**// folder as root directory. After the root directory is chosen the projects that reside in that directory will appear in the //Projects// list. Press //Finish// to finalize the import process. +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:projects_import.png?400 | Projects Import}}  +
-  * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the //Console// window will display the the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option. +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:project_explorer.png?400 | Project Explorer}} +
-  * The default project configuration assumes that a Xilinx ML605 FPGA board is used and that the FMCOMMS1 is connected to this board on the FMC LPC connector. In the file //Common/main.c// change the //XCOMM_DefaultInit// initialization structure so that the FPGA board and the FMC port used to connect the FMCOMMS1 to the FPGA board correspond to your actual hardware setup. +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:board_config.png?400 | Board Configuration}} +
-  * At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system. +
- +
-The no-OS drivers source code contains an example on how to: +
-  * initialize the board +
-  * test the ADC communication +
-  * test the DAC communication +
-  * set the VGA gain +
-  * set the receive and transmit frequencies  +
-  * send a sinewave over the air and receive it back +
-The example code outputs on the UART the status of each operation as shown below. +
- +
-{{ :resources:fpga:xilinx:fmc:ad-fmcomms1-ebz:xcomm_test.png?400 | XCOMM Test Program Output}} +
- +
-The output of the example program can be viewed in the SDK console by enabling the //Connect STDIO Console// option and setting the baud rate of the UART port to 57600. +
- +
-{{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:stdio_config.png?400 | STDIO Configuration}} +
- +
-As an alternative an UART terminal can be used to capture the output of the example program. The number of used UART port depends on the computer's configuration. The following settings must used in the UART terminal: +
-  * Baud Rate: 57600bps (for ML605KC705) / 115200bps (for ZC702 and ZED Board) +
-  * Data: 8 bit +
-  * Parity: None +
-  * Stop bits: 1 bit +
-  * Flow Control: none +
- +
-The example code is located in the "//Common/main.c//" file and the implementations of  the ADC and DAC test routines can be found in the "//Common/test.c//" file.  +
- +
-After running the example program the system is configured to generate a sinewave and send it over the air using a 2.4GHz carrier. The signal is received back, brought to baseband again and digitized by the ADC on the FMCOMMS1. The I and Q samples generated by the ADC can be viewed using the Chipscope project from the "//Chipscope//" folder. These are the steps than need to be followed to view the sine waves in Chipscope: +
-  * open Chipscope and press the **//Open Cable/Search JTAG Chain//** button (the leftmost button located under the File menu) +
-  * open the //Chipscope/.cpj// project that corresponds to the used FPGA board +
-  * start the data capture +
-This is how the output of the ADC looks like. +
- +
-{{ :resources:fpga:xilinx:fmc:ad-fmcomms1-ebz:xcomm_chipscope.png?500 | ADC output}}   +
 ===== Software Setup for Vivado ===== ===== Software Setup for Vivado =====
 Example for a ZC702 board: Example for a ZC702 board:
-  * After [[http://wiki.analog.com/resources/fpga/docs/hdl/vivado | building the project in Vivado]] for the used FPGA board, a //**SDK_Export**// folder will be created in //**../fmcomms1_board.sdk/SDK**//+  * After [[/resources/fpga/docs/build | building the project in Vivado]] for the used FPGA board, a //**SDK_Export**// folder will be created in //**../fmcomms1_board.sdk/SDK**//
   * Open the Xilinx SDK for Vivado. When the SDK starts it asks to provide a folder where to store the workspace. Any folder can be provided.    * Open the Xilinx SDK for Vivado. When the SDK starts it asks to provide a folder where to store the workspace. Any folder can be provided. 
   * Go to //**File->New->Application project**//    * Go to //**File->New->Application project**// 
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:new_app_project.png?600 | New Application Project}} {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:new_app_project.png?600 | New Application Project}}
-  * Use a new hardware platform, so choose //**Create new**// in //**Hardware Platform**// +  * Use a new hardware platform, so choose //**New**// in //**Target Hardware**// section 
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:new_platform.png?400 | New Platform}} {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:new_platform.png?400 | New Platform}}
-  * In //**Target Hardware Specification**// browse the location of //**SDK_Export\hw\system.xml**// and click //**Finish**//+  * At the **Target Hardware Specification** section browse the location of the hardware description file. This file's extension should be **.xml** or **.hdf**, and is located in the directory of the hdl design. **Note:** If the file does not exist, probably you forgot to make an **Export hardware** (in Vivado **File** -> **Export** -> **Export Hardware...**)
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:fmcomms1_new_hw_project.png?400 | New Hardware Project}} {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:fmcomms1_new_hw_project.png?400 | New Hardware Project}}
   * Then give a name to the project and click //**Next**//   * Then give a name to the project and click //**Next**//
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   * In the window that appears go to //**Settings->Directories**// and include the paths of the directories from //**src**// for both //**Debug**// and //**Release**// configurations.   * In the window that appears go to //**Settings->Directories**// and include the paths of the directories from //**src**// for both //**Debug**// and //**Release**// configurations.
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:fmcomms1_settings_include_directories_paths.png?600 | Include paths}} {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:fmcomms1_settings_include_directories_paths.png?600 | Include paths}}
-  * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the //Console// window will display the the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option.+  * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the //Console// window will display the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option.
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:fmcomms1_project_explorer_zynq.png?600 | Project Explorer}} {{ :resources:eval:user-guides:ad-fmcomms1-ebz:quickstart:fmcomms1_project_explorer_zynq.png?600 | Project Explorer}}
   * The default project configuration assumes that a Xilinx ML605 FPGA board is used and that the FMCOMMS1 is connected to this board on the FMC LPC connector. In the file //Common/main.c// change the //XCOMM_DefaultInit// initialization structure so that the FPGA board and the FMC port used to connect the FMCOMMS1 to the FPGA board correspond to your actual hardware setup.   * The default project configuration assumes that a Xilinx ML605 FPGA board is used and that the FMCOMMS1 is connected to this board on the FMC LPC connector. In the file //Common/main.c// change the //XCOMM_DefaultInit// initialization structure so that the FPGA board and the FMC port used to connect the FMCOMMS1 to the FPGA board correspond to your actual hardware setup.
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   * This is how the //Vivado Hardware Manager// looks like. Now go to Probes files.   * This is how the //Vivado Hardware Manager// looks like. Now go to Probes files.
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:hardware:vivado_hardware_device_properties.png?600 | Device Properties}} {{ :resources:eval:user-guides:ad-fmcomms1-ebz:hardware:vivado_hardware_device_properties.png?600 | Device Properties}}
-  * And browse for the folder where the project was complied //**../fmcomms1_board.runs/impl_1/debug_nets.ltx**//+  * And browse for the folder where the project was compiled //**../fmcomms1_board.runs/impl_1/debug_nets.ltx**//
 {{ :resources:eval:user-guides:ad-fmcomms1-ebz:hardware:fmcomms1_specify_probes_file.png?400 | Specify Probes File}}   {{ :resources:eval:user-guides:ad-fmcomms1-ebz:hardware:fmcomms1_specify_probes_file.png?400 | Specify Probes File}}  
   * Then do a right click on the active target and choose //**Refresh Device**//   * Then do a right click on the active target and choose //**Refresh Device**//
resources/eval/user-guides/ad-fmcomms1-ebz/quickstart/no_os_microblaze.1406209886.txt.gz · Last modified: 24 Jul 2014 15:51 by Lucian Sin