HDL Reference Designs

Two HDL reference designs are provided targeting different use cases and system complexity levels:

Xilinx ISE HDL Project + Chipscope Interface
- Control and monitoring through Chipscope
- Only manual control
- Monitoring of system important parameters
- Simple to synthetize / understand / utilize
HDL Project for Linux
- Complex HDL blocks with AXI Lite and AXI streaming interfaces
- Infrastructure for Linux support
- Integration of automatically generated HDL code for Simulink designed motor controller
- EDK and Vivado projects

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