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resources:eval:user-guides:ad-fmcadc7-ebz [02 Feb 2016 22:01]
RReeder
resources:eval:user-guides:ad-fmcadc7-ebz [03 Feb 2016 17:00] (current)
RReeder
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 ===== Introduction ===== ===== Introduction =====
  
-The [[adi>​AD-FMCADC7-EBZ]] is a high speed single channel data acquisition board featuring the [[adi>​AD9625]] a single channel differential Analog-to-Digital converter at 2.5 GHz and an [[adi>​ADL5567]] dual channel differential 4.8 GHz amplifier. This is an FMC compatible board. The clocking can be done four different ways including external variations and on-board variations with Crystek ​oscillators ​and an [[adi>​ADF4355-2]].+The [[adi>​AD-FMCADC7-EBZ]] is a high speed single channel data acquisition board featuring the [[adi>​AD9625]] a single channel differential Analog-to-Digital converter at 2.5 GHz and an [[adi>​ADL5567]] dual channel differential 4.8 GHz amplifier. This is an FMC compatible board. The clocking can be done three different ways including external variations and on-board variations with Crystek ​oscillator ​and an [[adi>​ADF4355-2]].
  
 ADI also provides reference designs (HDL and software) for this board to work with commonly available Altera and Xilinx development boards. ​ ADI also provides reference designs (HDL and software) for this board to work with commonly available Altera and Xilinx development boards. ​
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 ===== Hardware ===== ===== Hardware =====
  
-The AD-FMCADC7-EBZ board'​s primary purpose is to demonstrate the capabilities of the devices on board quickly and easily by providing a seamless interface to an FMC carrier platform and running the reference design on the carrier FPGA. The board is designed to self power and self clock when connected to the FMC carrier. The analog signals ( AIN+ and AIN-) are connected to J202 and J201. This rapid prototyping board is default set up with to utilize ​port J202.+The AD-FMCADC7-EBZ board'​s primary purpose is to demonstrate the capabilities of the devices on board quickly and easily by providing a seamless interface to an FMC carrier platform and running the reference design on the carrier FPGA. The board is designed to self power and self clock when connected to the FMC carrier. The analog signals ( AIN+ and AIN-) are connected to J202 and J201. This rapid prototyping board is default set up with to utilize ​input J202 for a single-ended connection from a signal generator.
  
 ==== Devices ==== ==== Devices ====
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 The AD-FMCADC7-EBZ includes various clocking options: The AD-FMCADC7-EBZ includes various clocking options:
-      - 2.5GHz Crystek on-board oscillator to a differential balun +      - 2.5GHz Crystek on-board oscillator, Y401, to a differential balun which connects directly to the converter'​s clock input pins. 
-      - An external reference supplied at J401 +      - An external reference supplied at J301 to use in conjunction with the ADF4355-2. 
-      - 122.88MHz Crystek on-board oscillator ​differential or single ended to the ADF4355-2 +      - 122.88MHz Crystek on-board oscillator reference to the ADF4355-2
-      - An external ​reference ​supplied to J301 that would be provided ​to the ADF4355-2+
  
 ==== Analog Front End ==== ==== Analog Front End ====
  
-The AD-FMCADC7-EBZ uses a active front end designed for very wide bandwidth. ​ A single ended input needs to be provided to the analog inputs ​mentioned earlier The broadband amplifier ​then converts the input signal ​differentially ​to the converter'​s inputs and has a 1.8GHz bandwidth at -3dB. The amplifier'​s gain can be adjusted independently with some simple resistor modifications.+The AD-FMCADC7-EBZ uses a active front end designed for very wide bandwidth. ​ A single ended input needs to be provided to the analog inputs ​at -15dBm. The broadband amplifier ​gains and converts the analog ​input signal ​deferentially ​to the converter'​s inputs and has a 1.8GHz bandwidth at -3dB. The amplifier'​s gain can be adjusted independently with some simple resistor modifications.
  
  
resources/eval/user-guides/ad-fmcadc7-ebz.txt · Last modified: 03 Feb 2016 17:00 by RReeder