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resources:eval:user-guides:ad-fmcadc7-ebz [16 Nov 2015 19:56]
michael gibson [Running No-OS Application & Changing Sampling Rate to 1.24GHz]
resources:eval:user-guides:ad-fmcadc7-ebz [02 Feb 2016 22:01]
Rob Reeder
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 ===== Introduction ===== ===== Introduction =====
  
 +The [[adi>​AD-FMCADC7-EBZ]] is a high speed single channel data acquisition board featuring the [[adi>​AD9625]] a single channel differential Analog-to-Digital converter at 2.5 GHz and an [[adi>​ADL5567]] dual channel differential 4.8 GHz amplifier. This is an FMC compatible board. The clocking can be done four different ways including external variations and on-board variations with Crystek oscillators and an [[adi>​ADF4355-2]].
  
 ADI also provides reference designs (HDL and software) for this board to work with commonly available Altera and Xilinx development boards. ​ ADI also provides reference designs (HDL and software) for this board to work with commonly available Altera and Xilinx development boards. ​
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 ===== Hardware ===== ===== Hardware =====
  
-The AD-FMCADC4-EBZ board'​s primary purpose is to demonstrate the capabilities of the devices on board quickly and easily by providing a seamless interface to an FMC carrier platform and running the reference design on the carrier FPGA. The board is designed to self power and self clock when connected to the FMC carrier. The analog signals (up to four) are connected to J301A, J301B, J301C and J301D. This rapid prototyping board can also be synchronized across channels.+The AD-FMCADC7-EBZ board'​s primary purpose is to demonstrate the capabilities of the devices on board quickly and easily by providing a seamless interface to an FMC carrier platform and running the reference design on the carrier FPGA. The board is designed to self power and self clock when connected to the FMC carrier. The analog signals ( AIN+ and AIN-) are connected to J202 and J201. This rapid prototyping board is default set up with to utilize port J202.
  
 ==== Devices ==== ==== Devices ====
  
 The FMC board includes the following products by Analog Devices: The FMC board includes the following products by Analog Devices:
-  * [[adi>AD9680]] 14-bit dual channel ADC with sampling speeds of up to 1250 MSPS, with a [[adi>JESD204|JESD204B]]  ​digital interface+  * [[adi>ADR280ARTZ]] 1.2 V Ultralow Power High PSRR Voltage Reference 
-  * [[adi>ADA4961]]  Low Distortion, 3.GHz, RF Digital Gain Amplifier. +  * [[adi>AD9625BBPZ-2.5]] 12-Bit, 2.5 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter 
-  * [[adi>AD9528]]  ​JESD204B Clock Generator ​with 14 LVDS Outputs +  * [[adi>ADL5567ACPZ]] 4.GHz Ultrahigh Dynamic RangeDual Differential ​Amplifier 
-  * [[adi>ADP2384]] 20 VA, SynchronousStep-Down DC-to-DC ​Regulator +  * [[adi>ADF4355-2BCPZ]] Microwave Wideband Synthesizer ​with Integrated VCO 
-  * [[adi>ADP7104]] is a 20V500mAlow noise, CMOS LDO +  * [[adi>AD7291BCPZ]] 8-ChannelI2C, 12-Bit SAR ADC with Temperature Sensor 
-  * [[adi>ADM7154]] 600 mAUltra Low NoiseHigh PSRR, RF Linear Regulator +  * [[adi>​ADP1753ACPZ]] 0.8 A, Low VINLow Dropout Linear ​Regulator 
-  * [[adi>ADM7172]]  6.5 V, 2 AUltralow NoiseHigh PSRR, Fast Transient Response CMOS LDO +  * [[adi>ADP7104ARDZ-R7]] 20 V500 mALow Noise, CMOS LDO 
-  * [[adi>ADP1741]] is a 2Alow Vinlow dropoutCMOS linear regulator+  * [[adi>ADP1741ACPZ]] 2 A, Low VINLow Dropout ​Linear Regulator 
 +  * [[adi>ADP2119ACPZ]] 2 A/1.25 A1.MHzSynchronousStep-Down DC-to-DC Regulator 
 +  * [[adi>ADP2442ACPZ]] 36 V,1 ASynchronousStep-Down, DC-to-DC Regulator with  
 +          * External Clock Synchronization
   ​   ​
-{{ :​resources:​eval:​user-guides:​20150331_135648-final.jpg?​nolink&​300 |}}+{{ :​resources:​eval:​user-guides:​fmcadc7-top.jpg?​nolink&​200 |}}
                                                    Top View                                                    Top View
  
-{{ :​resources:​eval:​user-guides:​20150402_100228-finalbot.jpg?​nolink&​300 |}}+{{ :​resources:​eval:​user-guides:​fmcadc7-bot.jpg?​nolink&​200 |}}
                                                    ​Bottom View                                                    ​Bottom View
  
 ==== Clocking ==== ==== Clocking ====
  
-The AD-FMCADC4-EBZ includes ​an on-board ​80MHz reference ​oscillator ​from Crystek. This feature can be disconnected and an external reference ​can be applied through J901When referencing the schematic make sure the proper component changes are made in order to directly route the input into the AD9528.+The AD-FMCADC7-EBZ includes ​various clocking options: 
 +      - 2.5GHz Crystek ​on-board oscillator ​to a differential balun 
 +      - An external reference ​supplied at J401 
 +      - 122.88MHz Crystek on-board oscillator differential or single ended to the ADF4355-2 
 +      - An external reference supplied to J301 that would be provided ​to the ADF4355-2
  
 ==== Analog Front End ==== ==== Analog Front End ====
  
-The AD-FMCADC4-EBZ uses a passive ​front end designed for very wide bandwidth. ​ A single ended input needs to be provided to the analog inputs mentioned earlier.  ​A 1:2 impedance ratio broadband ​balun then converts the input signal differentially to the ADA4961 ​inputs and has a 1.6GHz bandwidth at -3dB. Each channel ​amplifier can be adjusted independently ​in terms of gain.+The AD-FMCADC7-EBZ uses a active ​front end designed for very wide bandwidth. ​ A single ended input needs to be provided to the analog inputs mentioned earlier.  ​The broadband ​amplifier ​then converts the input signal differentially to the converter'​s ​inputs and has a 1.8GHz bandwidth at -3dB. The amplifier's gain can be adjusted independently ​with some simple resistor modifications.
  
-==== Revision A ==== 
  
-The revision A board supports amplifier gain control via spi. After power-up, the gain of the amplifier defaults to an attenuated state. Use a low jitter, low noise signal source with a level at -20dBm to the analog inputs (J301-A/B/C/D). Apply a signal source no greater than -10dBm to achieve full-scale of the converter when maximum gain of the amplifier is applied. ​+==== Revision ​====
  
-===== Running No-OS Application & Changing Sampling Rate to 1.24GHz =====+The revision B board is default set for the amplifier ​to be at max gain with dc couplingHardware changes are required to change either the gain or dc coupling to ac coupling.  ​
  
- 
- 
-{{:​resources:​eval:​user-guides:​fmcadc4_ila.png?​500|FMCADC4-ILA}} 
  
  
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 <WRAP download>​ <WRAP download>​
-Rev A: 
-  * {{:​undefined:​ska_eval-08212014.pdf| Schematic}} 
-  * {{:​resources:​eval:​user-guides:​ska_bom-03172015.xlsx| Bill of Materials}} 
-  * {{:​resources:​eval:​user-guides:​ska_eval_fab.pdf| PCBoard Fab Drawing}} 
-  * {{:​resources:​eval:​user-guides:​ska_eval_cam2.zip| PCBoard Gerber files}} 
-</​WRAP>​ 
  
-===== Downloads (HDL) =====+Rev B: 
 +  * {{:​resources:​eval:​user-guides:​20_040403b_artwork.zip|}}| Gerber files}} 
 +  * {{:​resources:​eval:​user-guides:​ad_fmcadcv7b.pdf| Schematic}} 
 +  * {{:​resources:​eval:​user-guides:​ad-fmcadcv7b-ebz_bom-12142015-final.xls| Bill of Materials}}
  
-{{page>/resources/​fpga/​docs/​hdl/​downloads_insert#​fmcadc4&​nofooter&​noeditbtn}} +</WRAP>
-{{page>/​resources/​fpga/​docs/​hdl/​downloads_insert#​help_support&​nofooter&​noeditbtn}} +
- +
-===== Downloads (Linux) ===== +
- +
-  * [[/​resources/​tools-software/​linux-drivers/​iio-adc/​axi-jesd204b-hdl|JESD Linux Driver]] +
-  * [[/​resources/​tools-software/​linux-drivers/​iio-adc/​axi-adc-hdl|AD9680-ADA4961 Linux driver]] +
-  * [[/​resources/​tools-software/​linux-software/​zynq_images|ZC706 Linux image]]+
  
  
resources/eval/user-guides/ad-fmcadc7-ebz.txt · Last modified: 08 Jan 2021 08:54 by Ioana Chelaru