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This version (08 Mar 2024 13:32) was approved by Stanca-Florina Pop.The Previously approved version (22 Jun 2023 13:45) is available.Diff

AD-DAC-FMC-EBZ reference HDL design

The dac_fmc_ebz is a generic reference design that can be configured to support one of the following JESD204B based DAC evaluation boards.

HDL source code

Reference can be accessed from the following location:

Software support

From the following list, the projects that have device-tree available (DTS) have been validated in hardware
Hardware Evaluation Document Software support Linux Driver
ZCU102 ZC706 Arria 10 SoC
EVAL-AD9135 EVAL-AD9135
EVAL-AD9136 EVAL-AD9136
EVAL-AD9144 EVAL-AD9144 dts
EVAL-AD9152 EVAL-AD9152
EVAL-AD9154 EVAL-AD9154 dts
EVAL-AD916x EVAL-AD916x
EVAL-AD917x EVAL-AD917x dts dts dts AD9172 Linux Driver

Supported Carriers

Block Diagram

The data path and clock domains are depicted on the below diagram.

The data to be sent to DAC can have multiple sources:

DMA source

In case of high sample rates where the required data rate exceeds the PS-PL interface available throughput, the data is transmitted in a loop from a local buffer (dac_fifo) which is loaded once with the DMA from the PS DDR. For lower sample rates the DAC FIFO can be placed in bypass mode, in this case the DMA must stream the data from the PS memory.

DDS source

For each DAC channel a tone is generated by a DDS core.

PRBS source

For each DAC channel one of the following PN sequence can be selected: PN7, PN15, inverted PN7, inverted PN15

Software defined pattern source

For each channel software can set the values which will be driven to the DAC.

Configuring the design

Before building the reference design the config.tcl file must be updated with the desired DAC device and JESD operation mode. The block design will scale according the selected mode. 

set device    AD9172
set mode      04

A list of the supported DAC devices and JESD operation modes can be found in the config.tcl file and tables below. To find out more on the JESD operation modes consult the datasheet of the selected DAC.

AD9135/AD9136 supported modes

Mode M L S F HD N NP
08 1 4 2 1 1 16 16
09 1 2 1 1 1 16 16
10 1 1 1 2 0 16 16
11 2 8 2 1 1 16 16
12 2 4 1 1 1 16 16
13 2 2 1 2 0 16 16

AD9144/AD9154 supported modes

Mode M L S F HD N NP
00 4 8 1 1 1 16 16
01 4 8 2 2 0 16 16
02 4 4 1 2 0 16 16
03 4 2 1 4 0 16 16
04 2 4 1 1 1 16 16
05 2 4 2 2 0 16 16
06 2 2 1 2 0 16 16
07 2 1 1 4 0 16 16
09 1 2 1 1 1 16 16
10 1 1 1 2 0 16 16

AD9152 supported modes

Mode M L S F HD N NP
04 2 4 1 1 1 16 16
05 2 4 2 2 0 16 16
06 2 2 1 2 0 16 16
07 2 1 1 4 0 16 16
09 1 2 1 1 1 16 16
10 1 1 1 2 0 16 16

AD9161/2/3/4 supported modes

Mode M L S F HD N NP
01 2 1 1 4 1 16 16
02 2 2 1 2 1 16 16
03 2 3 3 4 1 16 16
04 2 4 1 1 1 16 16
06 2 6 3 2 1 16 16
08 2 8 2 1 1 16 16

AD9171 supported modes

Mode M L S F HD N NP
00 2 1 1 4 1 16 16
03 2 2 1 2 1 16 16

AD9172/AD9174/AD9176 supported modes

Mode M L S F HD N NP
00 2 1 1 4 1 16 16
01 4 2 1 4 1 16 16
02* 6 3 1 4 1 16 16
03 2 2 1 2 1 16 16
04 4 4 1 2 1 16 16
08 2 4 1 1 1 16 16
09 2 4 2 2 1 16 16
10 2 8 2 1 1 16 16
11 2 8 4 2 1 16 16
18 1 4 2 1 1 16 16
19 1 4 4 2 1 16 16
20 1 8 4 1 1 16 16
21 1 8 8 2 1 16 16

*In mode 02:

  • Single-link supported by setting DAC_DATA_WIDTH = 128
  • Dual-link not supported

AD9173/AD9175 supported modes

Mode M L S F HD N NP
00 2 1 1 4 1 16 16
01 4 2 1 4 1 16 16
02 6 3 1 4 1 16 16
03 2 2 1 2 1 16 16
04 4 4 1 2 1 16 16
08 2 4 1 1 1 16 16
09 2 4 2 2 1 16 16
13 2 4 1 1 1 11 16
14 2 4 2 2 1 11 16
15 2 8 2 1 1 11 16
16 2 8 4 2 1 11 16

Software support

More Information

Support

Analog Devices will provide limited online support for anyone using the core with Analog Devices components (ADC, DAC, Video, Audio, etc) via the EngineerZone.

resources/eval/user-guides/ad-dac-fmc-ebz.txt · Last modified: 08 Mar 2024 13:32 by Stanca-Florina Pop

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