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resources:eval:user-guide:adskpmb10-ev-fmcz [31 May 2023 15:20] – [Evaluation Kit Contents] Chelsea Faye Aure | resources:eval:user-guide:adskpmb10-ev-fmcz [02 Jun 2023 04:04] (current) – [Schematic, PCB Layout, Bill of Materials] Chelsea Faye Aure |
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==== SDP-H1 Controller Board ==== | ==== SDP-H1 Controller Board ==== |
The EV-ADAQ7768-1FMC1Z evaluation board uses the serial peripheral interface (SPI) and is connected to the high speed controller board for the system demonstration platform (SDP-H1) controller board. The SDP-H1 board requires power from a 12 V wall adapter. The SDP-H1 has the Xilinx® Spartan 6 and [[adi>ADSP-BF527]] processor with connectivity to the PC through a USB 2.0 high speed port. The controller boards configure and capture data on the daughter boards from the PC through a USB. | The [[adi>ADSKPMB10-EV-FMCZ]] evaluation board uses the serial peripheral interface (SPI) and is connected to the high speed controller board for the system demonstration platform (SDP-H1) controller board. The SDP-H1 board requires power from a 12 V wall adapter. The SDP-H1 has the Xilinx® Spartan 6 and [[adi>ADSP-BF527]] processor with connectivity to the PC through a USB 2.0 high speed port. The controller boards configure and capture data on the daughter boards from the PC through a USB. |
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The SDP-H1 has an FMC low pin count (LPC) connector with full differential LVDS and singled-ended LVCMOS support. It also features the 160-pin connector, found on the [[adi>SDP-B]], which exposes the Blackfin® processor peripherals. This connector provides a configurable serial, parallel I²C and SPI, and general-purpose input/output (GPIO) communication lines to the attached daughter board for the functional description of the on-board power supplies. | The SDP-H1 has an FMC low pin count (LPC) connector with full differential LVDS and singled-ended LVCMOS support. It also features the 160-pin connector, found on the [[adi>SDP-B]], which exposes the Blackfin® processor peripherals. This connector provides a configurable serial, parallel I²C and SPI, and general-purpose input/output (GPIO) communication lines to the attached daughter board for the functional description of the on-board power supplies. |
<WRAP round 80% download> | <WRAP round 80% download> |
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[[ADSKPMB10-EV-FMCZ Design & Integration Files]] | {{ :resources:eval:user-guide:adskpmb10-ev-fmcz:adskpmb10-ev-fmcz_design_integration_files.zip | ADSKPMB10-EV-FMCZ Design & Integration Files}} |
* Schematics | * Schematics |
* {{ :resources:eval:user-guides:adskpmb02-ev-fmcz:02-065908-01-b.pdf | Precision Medium Bandwidth Data Acquisition Board}} | * {{ :resources:eval:user-guides:adskpmb02-ev-fmcz:02-065908-01-b.pdf | Precision Medium Bandwidth Data Acquisition Board}} |
* {{ :resources:eval:user-guides:adskpmb02-ev-fmcz:02-071850-01-b.pdf | Fully Isolated PMOD-to-FMC Board}} | * {{ :resources:eval:user-guides:adskpmb02-ev-fmcz:02-071850-01-b.pdf | Fully Isolated PMOD-to-FMC Board}} |
* PCB Layout | * PCB Layout |
* Bill of Materials | * Bill of Materials |